Localization of high-power lasers accelerates, and development bottlenecks need to be broken Superpower lasers are characterized by small size, light weight, high electro-optic conversion efficiency, stable performance, high reliability and lon
Technical Library | 2019-08-07 22:56:45.0
The requirement to reconsider traditional soldering methods is becoming more relevant as the demand for bottom terminated components (QFN/BTC) increases. Thermal pads under said components are designed to enhance the thermal and electrical performance of the component and ultimately allow the component to run more efficiently. Additionally, low voiding is important in decreasing the current path of the circuit to maximize high speed and RF performances. The demand to develop smaller, more reliable, packages has seen voiding requirements decrease below 15 percent and in some instances, below 10 percent.Earlier work has demonstrated the use of micro-fluxed solder preforms as a mechanism to reduce voiding. The current work builds upon these results to focus on developing an engineered approach to void reduction in leadless components (QFN) through increasing understanding of how processing parameters and a use of custom designed micro-fluxed preforms interact. Leveraging the use of a micro-fluxed solder preform in conjunction with low voiding solder paste, stencil design, and application knowhow are critical factors in determining voiding in QFN packages. The study presented seeks to understand the vectors that can contribute to voiding such as PCB pad finish, reflow profile, reflow atmosphere, via configuration, and ultimately solder design.A collaboration between three companies consisting of solder materials supplier, a power semiconductor supplier, and an electronic assembly manufacturer worked together for an in-depth study into the effectiveness of solder preforms at reducing voiding under some of the most prevalent bottom terminated components packages. The effects of factors such as thermal pad size, finish on PCB, preform types, stencil design, reflow profile and atmosphere, have been evaluated using lead-free SAC305 low voiding solder paste and micro-fluxed preforms. Design and manufacturing rules developed from this work will be discussed.
Industry News | 2020-09-10 11:16:53.0
Two Indium Corporation experts will present technical content during IMAPS International Symposium on Microelectronics, a global virtual event, Oct. 5-8.
Industry News | 2014-08-20 11:40:53.0
Indium Corporation's Sehar Samiappan, area technical manager for North Malaysia, the Philippines, and Vietnam, will present at the SMTA Penang Chapter's meeting on Aug. 21.
Industry News | 2016-10-04 16:22:38.0
SMART Group announces that it will host a workshop called “Soldering Voids: Formation, Causes and Mitigation” on Tuesday 25th October 2016 at the Manufacturing Technology Centre (MTC) in Ansty Park near Coventry.
Industry News | 2014-09-04 23:32:50.0
Indium Corporation's Wolfgang Bloching, regional sales manager for Germany, Austria, and Switzerland, will present at Yamaha Technology Day on Oct. 1 in Neuss, Germany.
Industry News | 2014-08-12 13:50:53.0
Indium Corporation's Wisdom Qu, assistant technical manager, and Fengying Zhou, research chemist, will present at the SMTA China South Conference Aug. 26-28 in Shenzhen, China.
Industry News | 2016-08-30 14:34:00.0
Indium Corporation experts will deliver several technical presentations at the 37th International Electronics Manufacturing Technology and 18th Electronics Material & Packaging Conference (IEMT-EMAP 2016), Sept. 20-22, in Penang, Malaysia.
Industry News | 2014-02-27 11:48:51.0
Several Indium Corporation technology experts will present at IPC APEX March 25-27 in Las Vegas, Nevada.
Industry News | 2016-03-03 10:33:15.0
Indium Corporation's Sze Pei Lim, Semiconductor Product Manager for Asia, will present at SEMICON China. Lim's presentation, No-Clean Material for Advanced Packaging Assembly, will detail how semiconductor-grade, ultra-low residue, no-clean fluxes and solder pastes eliminate the need for multiple cleaning steps in the system-in-package (SiP) assembly process.
