Electronics Forum | Thu Oct 10 16:13:01 EDT 2002 | slthomas
"Do you work for Air-Vac or what?" My question as well. If so, it is my opinion that there is a need for some house cleaning, because dissing a competitor's product on this forum is gutter-dweller tactics. If not, can you (AJ, not Russ) provide so
Electronics Forum | Mon Oct 07 13:15:41 EDT 2002 | razorsek
Russ, this post doesn't specificly address your original post but I thought it is relevant to your situation and future production. I have been having problems with voids using Kester's R596L paste. I contacted them for a solution to my problem. T
Electronics Forum | Thu Mar 25 11:30:33 EDT 2010 | Sean
Hello Rajeshwara, If not mistaken, the 25% solder void specification is for BGA...As I I as know, no specification given to mosfet component yet..I think you are right, I need to look at the stencil aperture in order to reduce the air trap underneat
Electronics Forum | Thu Sep 02 07:50:27 EDT 2010 | sachu_70
Just to add to my comments,solder joint voids do occur in LGA. Voids in LGA can be larger due to geometry and greater ratio of flux to solder. IPC-A-610D specifies a greater than 25% voided area is a defect for BGA, however, it does not specify the d
Electronics Forum | Thu Oct 26 18:10:11 EDT 2000 | ptvianc
Philip: Cases 1-3, those criteria may be specified in more recent versions of ANSI/J-STD-001 and/or ANSI/IPC-A-610. Unfortunately, I do not have any new versions of these specs. that may cover these points. As for voids in BGA joints, I have not
Electronics Forum | Tue Jul 02 02:50:55 EDT 2002 | ianchan
Hi mates, was going thru the IPC-A-610C Standards, and noted BGA voids stands somewhere between 10%-25% voids permissible in the solder "ball" bump, after reflow process. Was wondering, hypothetical case study, is there any specification for voids
Electronics Forum | Wed Jan 15 23:32:36 EST 2003 | tinson
How about section 12.2.12 of IPC-A-610C? It doesn't include detailed description of root cause/effect but acceptance criteria.
Electronics Forum | Fri Aug 25 14:39:24 EDT 2006 | davef
1 When you peel the solder connection of a BGA, * If solder remains on the soldered surface [eg, component, substrate, etc], it's good. * If some solder remains and some base metal is present, it's marginal. * If no solder remains, it's NG. 2 Try I
Electronics Forum | Tue Nov 28 15:10:50 EST 2006 | M. Sanders
Unfortunately, I don't have a copy of IPC-A-610 D on hand, however, I believe in IPC-610, this �floating height� between lead and pad has no maximum specification restriction. As long as there is no voiding, it is still acceptable for all 3 classes.
Electronics Forum | Thu Dec 17 17:34:26 EST 1998 | Earl Moon
| Has any anyone established / published quality standards for BGA solder joints? Is IPC-A-610 in process of adding standards for BGAs? | The debate continues. I have felt for some time a maximum 20% voiding is allowable under certain conditions (w
