Technical Library | 2017-08-28 17:14:41.0
PCB suppliers in the automotive space are vastly accelerating their time to market by using automated optical inspection (AOI) systems during PCB assembly. However, this next-generation technique is not limited in scope to the automotive industry – it has powerful implications for the entire PCB industry.
Technical Library | 2019-12-12 02:43:44.0
Today we discuss the reason that causes temperature humidity chamber to alarm,In most cases, the equipment alarm is caused by the improper operation in the process of use, which mainly includes following reasons:that are refrigeration system, temperature system and circulating system. First, Refrigeration system 1, refrigeration compressor overpressure alarm. If the refrigerant pressure exceeds the set value, it will stop and alarm at the same time. At this time, the fault must be eliminated and then manually reset. 2, short phase power supply, phase sequence alarm. When the external power supply of the equipment is out of phase or the phase sequence is changed, it will stop and alarm at the same time. 3. The circulating cooling water is short of water to alarm. When the water pressure of the cooling circulating water system is insufficient, it will stop and alarm at the same time, and it must wait for the fault to be eliminated and reset at the same time before it could run normally. 4, refrigeration compressor overheating alarm. When the coil of the compressor is overheated and the power supply of the line is not normal, it will stop and alarm at the same time. Second, Temperature system 1, the overtemperature alarm in the chamber. The sensors in the channel and the sample area are equipped with overtemperature protection devices, and there are also overtemperature protecter on the control panel. When the temperature in the working chamber exceeds the setting value on the controller, it will stop and alarm. 2. sample overtemperature protection. When the temperature in the sample area exceeds the protection temperature set by the controller, it will stop and alarm at the same time. The overtemperature protection of the sample is divided into upper limit protection and lower limit protection, which can be set according to the demand, Third,Circulating system 1. The alarm is caused by the overheating of the circulating fan. When the coil of the fan is over-heated, the alarm will be stopped at the same time. 2. The fan over-current alarm. When the current of the fan exceeds the allowable value, the alarm is stopped at the same time, and the normal operation can only be carried out after the fault maintenance of the overcurrent is completed. This is what we talk about today,if you have more questions,let us know.
Technical Library | 2024-04-29 21:19:42.0
Over the years, computer vision and machine learning disciplines have considerably advanced the field of automated visual inspection for Printed Circuit Board (PCB-AVI) assurance. However, in practice, the capabilities and limitations of these advancements remain unknown because there are few publicly accessible datasets for PCB visual inspection and even fewer that contain images that simulate realistic application scenarios. To address this need, we propose a publicly available dataset, "FICS-PCB"1, to facilitate the development of robust methods for PCB-AVI. The proposed dataset includes challenging cases from three variable aspects: illumination, image scale, and image sensor. This dataset consists of 9,912 images of 31 PCB samples and contains 77,347 annotated components. This paper reviews the existing datasets and methodologies used for PCBAVI, discusses challenges, describes the proposed dataset, and presents baseline performances using feature engineering and deep learning methods for PCB component classification.
Technical Library | 2020-12-16 18:50:42.0
System operating speeds continue to increase as a function of the consumer demand for such technologies as faster Internet connectivity, video on demand, and mobile communications technology. As a result, new high performance PCB substrates have emerged to address signal integrity issues at higher operating frequencies. These are commonly called low Dk and/or low loss (Df) materials. The published "typical" values found on a product data sheet provide limited information, usually a single construction and resin content, and are derived from a wide range of test methods and test sample configurations. A printed circuit board designer or front end application engineer must be aware that making a design decision based on the limited information found on a product data sheet can lead to errors which can delay a product launch or increase the assembled PCB cost. The purpose of this paper is to highlight critical selection factors that go beyond a typical product data sheet and explain how these factors must be considered when selecting materials for high speed applications
Technical Library | 2020-03-26 14:55:29.0
This paper introduces line confocal technology that was recently developed to characterize 3D features of various surface and material types at sub-micron resolution. It enables automatic microtopographic 3D imaging of challenging objects that are difficult or impossible to scan with traditional methods, such as machine vision or laser triangulation.Examples of well-suited applications for line confocal technology include glossy, mirror-like, transparent and multi-layered surfaces made of metals (connector pins, conductor traces, solder bumps etc.), polymers (adhesives, enclosures, coatings, etc.), ceramics (components, substrates, etc.) and glass (display panels, etc.). Line confocal sensors operate at high speed and can be used to scan fast-moving surfaces in real-time as well as stationary product samples in the laboratory. The operational principle of the line confocal method and its strengths and limitations are discussed.Three metrology applications for the technology in electronics product manufacturing are examined: 1. 3D imaging of etched PCBs for micro-etched copper surface roughness and cross-sectional profile and width of etched traces/pads. 2. Thickness, width and surface roughness measurement of conductive ink features and substrates in printed electronics applications. 3. 3D imaging of adhesive dots and lines for shape, dimensions and volume in PCB and product assembly applications.
Technical Library | 2020-07-08 20:05:59.0
There is a compelling need for functional testing of high-speed input/output signals on circuit boards ranging from 1 gigabit per second (Gbps) to several hundred Gbps. While manufacturing tests such as Automatic Optical Inspection (AOI) and In-Circuit Test (ICT) are useful in identifying catastrophic defects, most high-speed signals require more scrutiny for failure modes that arise due to high-speed conditions, such as jitter. Functional ATE is seldom fast enough to measure high-speed signals and interpret results automatically. Additionally, to measure these adverse effects it is necessary to have the tester connections very close to the unit under test (UUT) as lead wires connecting the instruments can distort the signal. The solution we describe here involves the use of a field programmable gate array (FPGA) to implement the test instrument called a synthetic instrument (SI). SIs can be designed using VHDL or Verilog descriptions and "synthesized" into an FPGA. A variety of general-purpose instruments, such as signal generators, voltmeters, waveform analyzers can thus be synthesized, but the FPGA approach need not be limited to instruments with traditional instrument equivalents. Rather, more complex and peculiar test functions that pertain to high-speed I/O applications, such as bit error rate tests, SerDes tests, even USB 3.0 (running at 5 Gbps) protocol tests can be programmed and synthesized within an FPGA. By using specific-purpose test mechanisms for high-speed I/O the test engineer can reduce test development time. The synthetic instruments as well as the tests themselves can find applications in several UUTs. In some cases, the same test can be reused without any alteration. For example, a USB 3.0 bus is ubiquitous, and a test aimed at fault detection and diagnoses can be used as part of the test of any UUT that uses this bus. Additionally, parts of the test set may be reused for testing another high-speed I/O. It is reasonable to utilize some of the test routines used in a USB 3.0 test, in the development of a USB 3.1 (running at 10 Gbps), even if the latter has substantial differences in protocol. Many of the SI developed for one protocol can be reused as is, while other SIs may need to undergo modifications before reuse. The modifications will likely take less time and effort than starting from scratch. This paper illustrates an example of high-speed I/O testing, generalizes failure modes that are likely to occur in high-speed I/O, and offers a strategy for testing them with SIs within FPGAs. This strategy offers several advantages besides reusability, including tester proximity to the UUT, test modularization, standardization approaching an ATE-agnostic test development process, overcoming physical limitations of general-purpose test instruments, and utilization of specific-purpose test instruments. Additionally, test instrument obsolescence can be overcome by upgrading to ever-faster and larger FPGAs without losing any previously developed design effort. With SIs and tests scalable and upward compatible, the test engineer need not start test development for high-speed I/O from scratch, which will substantially reduce time and effort.
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