Technical Library: copper clad laminates (Page 1 of 2)

MPPE/SEBS Composites with Low Dielectric Loss for High-Frequency Copper Clad Laminates Applications

Technical Library | 2021-03-04 15:22:33.0

Copper clad laminates (CCLs) with low dissipation factor (Df) are urgently needed in the fields of high-frequency communications devices. A novel resin matrix of modified poly (2,6-dimethyl-1,4- phenylene ether) (MPPE) and styrene-ethylene/butylene-styrene (SEBS) was employed in the fabrication of high-frequency copper clad laminates (CCLs). The composites were reinforced by E-glass fabrics, which were modified with phenyltriethoxysilane (PhTES). The composite laminates obtained exhibited impressive dielectric loss of 0.0027 at 10 GHz when the weight ratio of MPPE to SEBS was 5:1.

Zhejiang University

Development of Halogen Free, Low Loss Copper-Clad Laminates Containing a Novel Phosphonate Oligomer

Technical Library | 2017-08-24 16:53:20.0

With the rapid development of the information industry, increasing attention is being paid to the dielectric performance of base materials including copper-clad laminates (CCL) and prepregs. In addition to the increasingly high performance requirements of CCL's, the present global attention to less toxic products is leading to an increase in the use of halogen-free flame retardants in electronics. (...) This paper introduces a new phosphonate oligomer which can be used as a reactive flame retardant in epoxy based resin systems. Suitable conditions for the complete reaction between the phosphonate oligomer and epoxy resin are described and the resulting halogen-free laminates with improved properties such as low Df, low coefficient of thermal expansion (CTE), high peel strength, and good toughness are presented.

FRX Polymers Inc.

Moisture Absorption Properties of Laminates Used in Chip Packaging Applications

Technical Library | 2020-11-29 22:06:45.0

Plastic laminates are increasingly used as interposers within chip packaging applications. As a component within the package, the laminate is subjected to package moisture sensitivity testing. The moisture requirements of chip packaging laminates are related to ambient moisture absorption and thermal cycling. Printed wiring board (PWB) laminates, however, are gauged on properties relating to wet processes such as resist developing, copper etching, and pumice scrubbing. Consequently, printed wiring board moisture absorption test methods differ from chip packaging test conditions.

Isola Group

Factors Affecting the Adhesion of Thin Film Copper on Polyimide

Technical Library | 2017-11-22 12:38:51.0

The use of copper foils laminated to polyimide (PI) as flexible printed circuit board precursor is a standard practice in the PCB industry. We have previously described[1] an approach to very thin copper laminates of coating uniform layers of nano copper inks and converting them into conductive foils via photonic sintering with a multibulb conveyor system, which is consistent with roll-to-roll manufacturing. The copper thickness of these foils can be augmented by electroplating. Very thin copper layers enable etching fine lines in the flexible circuit. These films must adhere tenaciously to the polyimide substrate.In this paper, we investigate the factors which improve and inhibit adhesion. It was found that the ink composition, photonic sintering conditions, substrate pretreatment, and the inclusion of layers (metal and organic) intermediate between the copper and the polyimide are important.

Intrinsiq Materials Inc.

Reliability of Embedded Planar Capacitors under Temperature and Voltage Stress

Technical Library | 2015-05-21 18:46:31.0

In this work the reliability of an embedded planar capacitor laminate under temperature and voltage stress is investigated. The capacitor laminate consisted of an epoxy-BaTiO3 composite sandwiched between two layers of copper. The test vehicle with the embedded capacitors was subjected to a temperature of 125oC and a voltage bias of 200 V for 1000 hours. Capacitance, dissipation factor, and insulation resistance were monitored in-situ. Failed capacitors exhibited a sharp drop in insulation resistance, indicating avalanche breakdown. The decrease in the capacitance after 1000 hours was no more than 8% for any of the devices monitored. The decrease in the capacitance was attributed to delamination in the embedded capacitor laminate and an increase in the spacing between the copper layers.

CALCE Center for Advanced Life Cycle Engineering

Analysis of Laminate Material Properties for Correlation to Pad Cratering

Technical Library | 2016-10-20 18:13:34.0

Pad cratering failure has emerged due to the transition from traditional SnPb to SnAgCu alloys in soldering of printed circuit assemblies. Pb-free-compatible laminate materials in the printed circuit board tend to fracture under ball grid array pads when subjected to high strain mechanical loads. In this study, two Pb-free-compatible laminates were tested, plus one dicycure non-Pb-free-compatible as control. One set of these samples were as-received and another was subjected to five reflows. It is assumed that mechanical properties of different materials have an influence on the susceptibility of laminates to fracture. However, the pad cratering phenomenon occurs at the layer of resin between the exterior copper and the first glass in the weave. Bulk mechanical properties have not been a good indicator of pad crater susceptibility. In this study, mechanical characterization of hardness and Young’s modulus was carried out in the critical area where pad cratering occurs using nano-indentation at the surface and in a cross-section. The measurements show higher modulus and hardness in the Pb-free compatible laminates than in the dicy-cured laminate. Few changes are seen after reflow – which is known to have an effect -- indicating that these properties do not provide a complete prediction. Measurements of the copper pad showed significant material property changes after reflow.

CALCE Center for Advanced Life Cycle Engineering

Types of flexible printed circuit board

Technical Library | 2012-12-26 20:18:50.0

①Single side The basic flexible printed circuit board is used of substrate of single side pcb materials and coated coverlay after finishing printed. ②Double sided That is made of substrates of double sided printed circuit board with double surface coated coverlays after finishing printed. ③Single copper foil with double coverlays Single copper foil coated different coverlays with double surface after finishing printed. ④Air gap Laminating two single printed circuit board together with no glue and bare design to meet high flexibility requirements. ⑤Multilayer That is designed for three and above circuit layers by laminating single side printed circuit board or double sided printed circuit board. ⑥COF IC chips and electronic components are installed on the flexible circuit board directly. ⑦Rigid-Flexible PCB Combined to rigid PCB with supporting and flexible PCB with high flexibility.

Everest PCB equipment Co.,Ltd

Copper/Epoxy Joints in Printed Circuit Boards: Manufacturing and Interfacial Failure Mechanisms

Technical Library | 2020-01-09 00:00:30.0

PCBs have a wide range of applications in electronics where they are used for electric signal transfer. For a multilayer build-up, thin copper foils are alternated with epoxy-based prepregs and laminated to each other. Adhesion between copper and epoxy composites is achieved by technologies based on mechanical interlocking or chemical bonding, however for future development, the understanding of failure mechanisms between these materials is of high importance. In literature, various interfacial failures are reported which lead to adhesion loss between copper and epoxy resins. This review aims to give an overview on common coupling technologies and possible failure mechanisms. The information reviewed can in turn lead to the development of new strategies, enhancing the adhesion strength of copper/epoxy joints and, therefore, establishing a basis for future PCB manufacturing.

Polymer Competence Center Leoben GmbH

High Frequency Dk and Df Test Methods Comparison High Density Packaging User Group (HDP) Project

Technical Library | 2019-02-06 22:02:08.0

The High Density Packaging (HDP) user group has completed a project to evaluate the majority of viable Dk (Dielectric Constant)/Df (Dissipation Factor) and delay/loss electrical test methods, with a focus on the methods used for speeds above 2 GHz. A comparison of test methods from 1 to 2 GHz through to higher test frequencies was desired, testing a variety of laminate materials (standard volume production with UL approval, low loss, and "halogen-free" laminate materials). Variations in the test board material resin content/construction and copper foil surface roughness/type were minimized. Problems with Dk/Df and loss test methods and discrepancies in results are identified, as well as possible correlations or relationships among these higher speed test methods.

Oracle Corporation

Qualification Test Development for Creep Corrosion

Technical Library | 2021-04-08 00:34:16.0

Creep corrosion is not a new phenomenon, it has become more prevalent since the enactment of the European Union's Restriction of Hazardous Substance (RoHS) Directive on 1 July 2006. The directive bans the use of lead and other hazardous substances in products (where lead-based surface finishes offered excellent corrosion resistance). The higher melting temperatures of the lead-free solders and their poor wetting of copper metallization on PCBs forced changes to PCB laminates, surface finishes and processing temperature-time profiles. As a result, printed circuit boards might have higher risk of creep corrosion.

iNEMI (International Electronics Manufacturing Initiative)

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