Technical Library: dimension (Page 1 of 3)

Materials Compatibility and Aging for Flux and Cleaner Combination

Technical Library | 2016-05-30 22:54:52.0

New engineered cleaning and defluxing agents promise great improvement in cleaning and reliability for electronic assemblies. As complexity grows and dimensions shrink in high reliability electronics, the need for materials compatibility and effectiveness in cleaning and rinsing is vital.

Sandia National Laboratories

Manufacturability & Reliability Challenges with Leadless Near Chip Scale (LNCSP) Packages in Pb-Free Processes

Technical Library | 2011-10-27 18:03:53.0

Leadless, near chip scale packages (LNCSP) like the quad flat pack no lead (QFN) are the fastest growing package types in the electronics industry today. Early LNCSPs were fairly straightforward components with small overall dimensions, a single outer row

DfR Solutions (acquired by ANSYS Inc)

Filling of Microvias and Through Holes by Electrolytic Copper Plating –Current Status and Future Outlook

Technical Library | 2020-03-12 13:10:35.0

The electronics industry is further progressing in terms of smaller, faster, smarter and more efficient electronic devices. This continuous evolving environment caused the development on various electrolytic copper processes for different applications over the past several decades. (...) This paper describes the reasons for development and a roadmap of dimensions for copper filled through holes, microvias and other copper plated structures on PCBs.

Atotech

Investigating the Metric 0201 Assembly Process

Technical Library | 2020-12-24 02:34:23.0

The advance in technology and its relentless development is delivering yet another surface mount assembly challenge. To meet the market demand for products with higher functionality whilst reducing the overall product size, the next generation of chip package is being readied upon the surface mount community. The Metric 0201 will have dimensions in the order of 0.25mm x 0.125mm, as a result the entire assembly process will be questioned as to its ability to deliver high volume/quality product.

ASM Assembly Systems (DEK)

Design and Experiment of a Moving Magnet Actuator Based Jetting Dispenser

Technical Library | 2021-01-13 21:29:27.0

Developing actuators to drive high-frequency jetting dispensers in the dispensing technology for electronic assembly applications has become a concern in recent years. This study proposed a new jetting dispenser without a displacement amplification mechanism directly actuated by a moving magnet actuator (MMA) to jet small fluid droplets. In this article, the main geometric dimensions of ...

National Cheng Kung University

Recommendations for Board Assembly of Infineon Thin Small Discrete Packages without Leads

Technical Library | 2021-04-01 14:36:51.0

This document provides information about the Surface Mount Technology (SMT) board assembly of Infineon Thin Small Non-leaded Packages (TSNP). The specific dimensions of the leadframe based inner setup depend on the size of the chip and the type of bonding. The field of application ranges from linear voltage regulators for weight-limited applications such as cellular phones and digital cameras to linear voltage regulators for the automotive sector.

Infineon Technologies AG

Latent heat induced deformation of PCB substrate: Measurement and simulation

Technical Library | 2022-12-05 16:28:06.0

The work evaluates the impact of latent heat (LH) absorbed or released by a solder alloy during melting or solidification, respectively, on changes of dimensions of materials surrounding of the solder alloy. Our sample comprises a small printed circuit board (PCB) with a blind via filled with lead-free alloy SAC305. Differential scanning calorimetry (DSC) was employed to obtain the amount of LH per mass and a thermomechanical analyzer was used to measure the thermally induced deformation. A plateau during melting and a peak during solidification were detected during the course of dimension change. The peak height reached 1.6 μm in the place of the heat source and 0.3 μm in the distance of 3 mm from the source. The data measured during solidification was compared to a numerical model based on the finite element method. An excellent quantitative agreement was observed which confirms that the transient expansion of PCB during cooling can be explained by the release of LH from the solder alloy during solidification. Our results have important implications for the design of PCB assemblies where the contribution of recalescence to thermal stress can lead to solder joint failure.

Czech Technical University in Prague

Achieving Tight Tolerances

Technical Library | 2024-05-31 19:29:15.0

A tight tolerance machine isn't necessarily a specific machine type. Rather, it's any machine capable of producing parts with precision tolerances. This means minimal variation in the final dimensions of the part. These cutting-edge tools are meticulously engineered to achieve exceptionally precise measurements within minuscule margins. This is accomplished with CNC, or computer numerical control, a manufacturing method that automates the movement of a machine and optimizes for precision. With technology and advanced techniques, these machines ensure that every component meets exact specifications, guaranteeing unparalleled accuracy in manufacturing processes.

A-Laser, Inc.

MOS Scaling: Transistor Challenges for the 21st Century

Technical Library | 1999-05-07 08:50:40.0

To enable transistor scaling into the 21st century, new solutions such as high dielectric constaConventional scaling of gate oxide thickness, source/drain extension (SDE), junction depths, and gate lengths have enabled MOS gate dimensions to be reduced from 10mm in the 1970’s to a present day size of 0.1mm. To enable transistor scaling into the 21st century, new solutions such as high dielectric constant materials for gate insulation and shallow, ultra low resistivity junctions need to be developed. In this paper, for the first time, key scaling limits are quantified for MOS transistorsnt materials for gate insulation and shallow, ultra low resistivity junctions need to be developed.

Intel Corporation

Numerical Study on New Pin Pull Test for Pad Cratering Of PCB

Technical Library | 2015-02-19 16:54:34.0

Pad cratering is an important failure mode besides crack of solder joint as it’ll pass the regular test but have impact on the long term reliability of the product. A new pin pull test method with solder ball attached and positioning the test board at an angle of 30º is employed to study the strength of pad cratering. This new method clearly reveals the failure mechanism. And a proper way to interpret the finite element analysis (FEA) result is discussed. Impact of pad dimension, width and angle of copper trace on the strength is included. Some findings not included in previous research could help to guide the design for better performance

Flex (Flextronics International)

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