Technical Library | 2013-07-03 10:31:54.0
It has been demonstrated in numerous pieces of work that stencil printing, one of the most complex PCB assembly processes, is one of the largest contributors to defects (Revelino et el). This complexity extends to prototype builds where a small number of boards need to be assembled quickly and reliably. Stencil printing is becoming increasingly challenging as packages shrink in size, increase in lead count and require closer lead spacing (finer pitch). Prototype SMT assembly can be further divided between industrial and commercial work and the DIYer, hobbyist or researcher groups. This second group is highly price sensitive when it comes to the materials used for the board assembly as their funds are sourced from personal or research monies as opposed to company funds. This has led to development of a lower cost SMT printing stencil made from plastic film as opposed to the more traditional stainless steel stencil used by industrial and commercial users.This study compares the performance of these two traditional materials and their respective impact on solder paste printing including efficiency and print quality.
Technical Library | 2022-01-05 22:51:59.0
200 °C) and high pressure. In this paper, a small-molecule assisted approach based on dynamic reaction was proposed to dissolve thermosetting polymers containing ester groups and recycle electronic components from PCBs.
Technical Library | 2012-05-31 21:10:26.0
ProSkill Consulting and Training Group “Current Strategies for Mitigating Counterfeit Components” By: Rick Stanton - PRO-STD-001 Course Director/Corporate VP of Quality It’s well known that counterfeiting has been linked to organized c
Technical Library | 2020-02-05 18:20:06.0
Consortium Projects - Thermal Cycling Reliability Consortium projects allow for joint research to investigate the reliability of multiple solder alloys under a variety of environmental stress conditions. Project jointly sponsored by iNEMI and HDP User Group and including CALCE and Universal consortium currently assessing 15 third-generation solder alloys..
Technical Library | 2023-10-19 22:03:14.0
Koh Young Technology, the industry leader in True 3D measurement-based inspection solutions, proudly releases another customer success story with Matric Group. This case study shows how Matric Group has leveraged their partnership with Koh Young to be one of the first in the industry to use pre-reflow AOI as a game-changer for line efficiency and improved yield. All while creating a central inspection war room to allow just one person to manage all inline inspection, increasing automation, and control and mitigating talent shortages.
Technical Library | 2015-11-25 14:15:12.0
In this study various printed circuit board surface finishes were evaluated, including: organic solderability preservative (OSP), plasma finish (PF), immersion silver (IAg), electroless nickel / immersion silver (ENIS), electroless nickel / immersion gold hi-phosphorus (ENIG Hi-P), and electroless nickel / electroless palladium / immersion gold (ENEPIG). To verify the performance of PF as a post-treatment option, it was added to IAg, ENIG Hi-P, and ENEPIG to compare with non-treated. A total of nine groups of PCB were evaluated. Each group contains 30 boards, with the exception on ENIS where only 8 boards were available.
Technical Library | 2013-08-29 19:52:43.0
Au over Ni on Cu is a widely used printed circuit board (PCB) surface finish, under bump metallization (UBM), and component lead metallization. It is generally accepted that less than 3 wt.% Au in Sn-Pb solder joints inhibits formation of detrimental intermetallic compounds (IMC). However, the critical limit for Au content in Pb-free solder joints is not well established. Three surface-mount package platforms, one with a matte Sn surface finish and the others with Ni/Au finish, were soldered to Ni/Au-finished PCB using Sn-3.0Ag 0.5Cu (SAC305) solder, in a realistic manufacturing setting. The assembled boards were divided into three groups: one without any thermal treatment, one subjected to isothermal aging at 125°C for 30 days, and the third group aged at 125°C for 56 days...
Technical Library | 2015-05-11 21:27:52.0
Originating from the last millenium, almost three decades ago, the introduction of surface mount packaging triggered a wave of changes throughout many aspects of electronics production. A small number of talented, innovative test engineers from various big players of the industry started to attend meetings to discuss the impact of that change of technology on their future test concepts for modern assemblies. The Joint Test Action Group was born.
Technical Library | 2017-03-02 18:13:05.0
The need for more energy-efficient solid-state switches beyond complementary metal-oxide-semiconductor (CMOS) transistors has become a major concern as the power consumption of electronic integrated circuits (ICs) steadily increases with technology scaling. Nano-Electro-Mechanical (NEM) relays control current flow by nanometer-scale motion to make or break physical contact between electrodes, and offer advantages over transistors for low-power digital logic applications: virtually zero leakage current for negligible static power consumption; the ability to operate with very small voltage signals for low dynamic power consumption; and robustness against harsh environments such as extreme temperatures. Therefore, NEM logic switches (relays) have been investigated by several research groups during the past decade. Circuit simulations calibrated to experimental data indicate that scaled relay technology can overcome the energy-efficiency limit of CMOS technology. This paper reviews recent progress toward this goal, providing an overview of the different relay designs and experimental results achieved by various research groups, as well as of relay-based IC design principles. Remaining challenges for realizing the promise of nano-mechanical computing, and ongoing efforts to address these, are discussed.
Technical Library | 2023-07-31 17:35:30.0
The benefits of autonomous vehicles (AVs) are widely acknowledged, but there are concerns about the extent of these benefits and AV risks and unintended consequences. In this article, we first examine AVs and different categories of the technological risks associated with them. We then explore strategies that can be adopted to address these risks, and explore emerging responses by governments for addressing AV risks. Our analyses reveal that, thus far, governments have in most instances avoided stringent measures in order to promote AV developments and the majority of responses are non-binding and focus on creating councils or working groups to better explore AV implications. The US has been active in introducing legislations to address issues related to privacy and cybersecurity. The UK and Germany, in particular, have enacted laws to address liability issues; other countries mostly acknowledge these issues, but have yet to implement specific strategies. To address privacy and cybersecurity risks strategies ranging from introduction or amendment of non-AV specific legislation to creating working groups have been adopted. Much less attention has been paid to issues such as environmental and employment risks, although a few governments have begun programmes to retrain workers who might be negatively affected.
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