Technical Library: note (Page 1 of 2)

Lead-Free Control Plan

Technical Library | 2020-06-02 15:16:51.0

A commercial systems manufacturer working on a major defense program contacted the Helpline for urgent assistance with an issue of failed parts during reliability testing. They were attempting to incorporate commercial off-the-shelf (COTS) computer-related hardware into a battlefield system and were experiencing reliability issues. It was noted that the parts were labeled by the vendor as "compliant to military (or MIL) standards" but not clearly identified as tin-lead or lead-free. ACI Technologies has supported a number of customers with lead-free issues and we assisted the customer in developing a short term and long-term solution to their problem.

ACI Technologies, Inc.

Wafer-Level Packaging (WLP) and Its Applications

Technical Library | 2023-10-23 18:28:42.0

This application note discusses the Maxim Integrated's wafer-level packaging (WLP) and provides the PCB design and surface-mount technology (SMT) guidelines for the WLP

Maxim Integrated Circuits

Extending Soldering Iron Tip Life

Technical Library | 1999-05-09 13:05:12.0

This Technical Note discusses the construction of solder tips, the various failure modes associated with tip plating (cracking, wear, corrosion, and dewetting), how to diagnose those failure modes, and specific practices that can be taken to minimize or eliminate each one.

Metcal

The Surface Finish Effect on the Creep Corrosion in PCB

Technical Library | 2012-05-10 19:48:10.0

First published in the 2012 IPC APEX EXPO technical conference proceedings. Creep corrosion normally happens in the end system, PCB, connectors and components are widely noted due to the exposure of high sulfur environments under elevated humidity. In thi

Integrated Service Technology (IST)

Surface Mount Rework Techniques

Technical Library | 1999-05-09 12:51:38.0

This Technical Note outlines, step by step, the easiest ways to remove and replace surface mounted devices, using the lowest possible temperatures. This document discusses the following topics: Removal and replacement of discrete and passive components (capacitors, resistors, SOTs), Removal of two-sided components (SOICs, SOJs, TSOPs), Removal of quad components (PLCCs, QFPs), Replacement of quad components including fine-pitched devices.

Metcal

Cree® XLamp® LED Thermal Management

Technical Library | 2009-06-11 18:28:24.0

XLamp LEDs lead the solid-state lighting industry in brightness while providing a reflow-solderable design that is optimized for ease of use and thermal management. Lighting applications featuring XLamp LEDs maximize light output and increase design flexibility, while minimizing environmental impact. This application note serves as a guide to understanding thermal management of XLamp LEDs and minimizing the effects of elevated junction temperatures.

Cree, Inc.

How to choose the material of PCB ?

Technical Library | 2019-12-30 02:09:39.0

How to choose the material of PCB ? The choice of PCB material must meet the design requirements, the quality of production and cost need to achieve a balance. The design requirements include electrical and institutional parts. This material problem is usually important when designing very high speed PCB boards (frequencies greater than GHz). For example, the commonly used FR-4 material may not be used when dielectric loss at several GHz frequencies, which can have a significant effect on signal attenuation . In the case of electrical, it is important to note whether the dielectric constant and the dielectric loss are combined at the designed frequency

PCBONLINE

Dielectric Material Damage Vs. Conductive Anodic Filament Formation

Technical Library | 2021-07-27 14:57:18.0

It should be noted that this is an overview paper that represents the early stages of an ongoing investigation into the causes and effects between conductive anodic filament (CAF) formation and printed wiring board (PWB) material damage. Our belief is that certain or specific types of material damage can increase the propensity for CAF formation. The preliminary data collected suggests is that there is no statistical correlation between the general definition of material damage (cohesive failure) and CAF. The resulting dichotomy is that we find no CAF failures in some coupons that have obvious material damage and we find CAF failures in coupons that don't exhibit material damage.

PWB Interconnect Solutions Inc.

QUANTIFYING THE IMPROVEMENTS IN THE SOLDER PASTE PRINTING PROCESS FROM STENCIL NANOCOATINGS AND ENGINEERED UNDER WIPE SOLVENTS

Technical Library | 2023-05-22 17:46:29.0

Over the past several years, much research has been performed and published on the benefits of stencil nano-coatings and solvent under wipes. The process improvements are evident and well-documented in terms of higher print and end-of-line yields, in improved print volume repeatability, in extended under wipe intervals, and in photographs of the stencil's PCB-seating surface under both white and UV light. But quantifying the benefits using automated Solder Paste Inspection (SPI) methods has been elusive at best. SPI results using these process enhancements typically reveal slightly lower paste transfer efficiencies and less variation in print volumes to indicate crisper print definition. However, the improvements in volume data do not fully account for the overall improvements noted elsewhere in both research and in production.

KYZEN Corporation

Effects of PCB Substrate Surface Finish and Flux on Solderability of Lead-Free SAC305 Alloy

Technical Library | 2021-10-20 18:21:06.0

The solderability of the SAC305 alloy in contact with printed circuit boards (PCB) having different surface finishes was examined using the wetting balance method. The study was performed at a temperature of 260 _C on three types of PCBs covered with (1) hot air solder leveling (HASL LF), (2) electroless nickel immersion gold (ENIG), and (3) organic surface protectant (OSP), organic finish, all on Cu substrates and two types of fluxes (EF2202 and RF800). The results showed that the PCB substrate surface finish has a strong effect on the value of both the wetting time t0 and the contact angle h. The shortest wetting time was noted for the OSP finish (t0 = 0.6 s with EF2202 flux and t0 = 0.98 s with RF800 flux), while the ENIG finish showed the longest wetting time (t0 = 1.36 s with EF2202 flux and t0 = 1.55 s with RF800 flux). The h values calculated from the wetting balance tests were as follows: the lowest h of 45_ was formed on HASL LF (EF2202 flux), the highest h of 63_ was noted on the OSP finish, while on the ENIG finish, it was 58_ (EF2202 flux). After the solderability tests, the interface characterization of cross-sectional samples was performed by means of scanning electron microscopy coupled with energy dispersive spectroscopy.

Foundry Research Institute

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