Technical Library | 2015-11-12 19:04:51.0
In order to provide the functionality in today’s electronics, printed circuit boards are approaching the complexity of semiconductors. For flexible circuits with 1 mil lines and spaces, this means no nodules, no pits, and excellent ductility with thinner deposits. One of the areas that has to change to get to this plateau of technology is acid copper plating. Acid copper systems have changed in minor increments since their introduction decades ago. However, the basic cell design using soluble anodes in slabs or baskets has for the most part remained the same. Soluble, phosphorized, copper anodes introduce particulate and limits the ability to control plating distribution.
Technical Library | 2016-07-21 18:16:06.0
Achieving optimum high-frequency printed-circuit-board (PCB) performance is not simply a matter of specifying the best possible PCB material, but can be significantly impacted by PCB fabrication practices. In addition to appropriate circuit materials and circuit design configurations to meet target performance goals, a number of PCB material-related issues can affect final performance, including the use of soldermask, the PCB copper plating thickness, the conductor trapezoidal effect, and plating finish; understanding the effects of these material issues can help when fabricating high-frequency circuits for the best possible electrical performance.
Technical Library | 2014-08-07 15:13:44.0
Gold embrittlement in SnPb solder is a well-known failure mechanism in electronic assembly. To avoid this issue, prior studies have indicated a maximum gold content of three weight percent. This study attempts to provide similar guidance for Pb-free (SAC305) solder. Standard surface mount devices were assembled with SnPb and SAC305 solder onto printed boards with various thicknesses of gold plating. The gold plating included electroless nickel immersion gold (ENIG) and electrolytic gold of 15, 25, 35, and 50 microinches over nickel. These gold thicknesses resulted in weight percentages between 0.4 to 7.0 weight percent.
Technical Library | 2015-06-04 19:10:47.0
Integrators and designers of high-reliability systems exert little or no control over component-level plating processes that affect the propensity for tin whiskering. Challenges of how to assure long-term reliability, while continuing to use COTS parts plated with pure tin, continue to arise. An integrated, quantitative, standardized methodology is proposed whereby mitigation levels can be selected that are appropriate for specific applications of pure tin for given end-uses. A system of hardware end-use classification is proposed, together with recommended appropriate risk mitigation approaches. An updated version of the application-specific risk assessment algorithm is presented together with recommended thresholds for acceptability within the context of the hardware classifications.
Technical Library | 2015-12-23 16:57:27.0
The onset of copper barrel cracks is typically induced by the presence of manufacturing defects. In the absence of discernible manufacturing defects, the causes of copper barrel cracks in printed circuit board (PCB) plated through holes is not well understood. Accordingly, there is a need to determine what affects the onset of barrel cracks and then control those causes to mitigate their initiation.The objective of this research is to conduct a design of experiment (DOE) to determine if there is a relationship between PCB fabrication processes and the prevalence of fine barrel cracks. The test vehicle used will be a 16-layer epoxy-based PCB that has two different sized plated through holes as well as buried vias.
Technical Library | 2016-01-07 19:13:23.0
The purpose of this study is to investigate the effect of plasma surface modification to improve adhesion strength between polytetrafluoroethylene (PTFE) and electroless copper plating. PTFE is widely used in many industries because of its unique electrical, thermal, and mechanical characteristics. However, because of its low surface energy, it is difficult to acquire enough adhesion strength between PTFE and other substances without surface modification. Plasma is well known as one of the surface modification techniques that improve adhesion strength.
Technical Library | 2020-03-12 13:10:35.0
The electronics industry is further progressing in terms of smaller, faster, smarter and more efficient electronic devices. This continuous evolving environment caused the development on various electrolytic copper processes for different applications over the past several decades. (...) This paper describes the reasons for development and a roadmap of dimensions for copper filled through holes, microvias and other copper plated structures on PCBs.
Technical Library | 2022-10-31 09:18:09.0
Model: STRIPPING DEVICE PLATE Type: High-speed Chip Mounter Brand: SIEMENS SIPLACE ASM QUALITY: 100% Tested Usage: SIPLACE SMT Placement Machine HIGH LIGHT: Surface Mount Components, Smt Machine Part High Light: 00341941S01 SMT Spare Parts, 12*16mm SMT Spare Parts, 00341941S01
Technical Library | 2019-11-07 08:59:14.0
Inductors realized with high permeable MnZn ferrite require, unlike iron-powder cores with an inherent dis-tributed gap, a discrete air gap in the magnetic circuit to prevent saturation of the core material and/or tune the inductance value. This large discrete gap can be divided into several partial gaps in order to reduce the air gap stray field and consequently the proximity losses in the winding. The multi-gap core, realized by stacking several thin ferrite plates and inserting a non-magnetic spacer material between the plates, however, exhibits a substan-tial increase in core losses which cannot be explained from the intrinsic properties of the ferrite. In this paper, a comprehensive overview of the scientific literature regarding machining induced core losses in ferrite, dating back to the early 1970s, is provided which suggests that the observed excess core losses could be attributed to a deterioration of ferrite properties in the surface layer of the plates caused by mechanical stress exerted during machining.
Technical Library | 2018-04-18 23:55:01.0
Higher functionality, higher performance and higher reliability with smaller real estate are the mantras of any electronic device and the future guarantees more of the same. In order to achieve the requirements of these devices, designs must incorporate fine line and via pitch while maintain good circuitry adhesion at a smooth plating-resin interface to improve signal integrity. The Semi-Additive Process (SAP) is a production-proven method used on low dielectric loss tangent (Df) build-up materials that enables the manufacture of ultra-fine circuitry. (...) This paper will discuss a new SAP process for low loss build-up materials with low desmear roughness (Ra= 40-100 nm) and excellent adhesion (610-680 gf/cm) at various processing conditions. Along with the process flow, the current work will also present results and a discussion regarding characterization on the morphology and composition of resin and/or metal plating surfaces using scanning electron microscopy (SEM) and energy dispersive X-ray spectroscopy (EDX), surface roughness analysis, plating-resin adhesion evaluation from 90o peel tests
