Technical Library | 2017-06-15 00:44:19.0
Ceramics packages are being used in the electronics industry to operate the devices in harsh environments. In this paper we report a study on acoustic imaging technology for nondestructively inspecting underfill layers connecting organic interposers sandwiched between two ceramics substrates.First, we inspected the samples with transmission mode of scanning acoustic tomography (SAT) system, an inspection routine usually employed in assembly lines because of its simpler interpretation criteria: flawed region blocks the acoustic wave and appears darker. In this multilayer sample, this approach does not offer the crucial information at which layer of underfill has flaws. To resolve this issue, we use C-Mode Scanning in reflection mode to image layer by layer utilizing ultrasound frequencies from 15MHz to 120MHz. Although the sample is thick and contains at least 5 internal material interfaces, we are able to identify defective underfill layer interfaces.
Technical Library | 2021-09-21 20:36:45.0
The present paper gives an overview of surface failures, internal nonconformities and solders joint failures detected by microscopic analysis of electronic assemblies. Optical microscopy (stereomicroscopy) and Fourier-Transform- Infrared (FTIR) microscopy is used for documentation and failure localization on electronic samples surface. For internal observable conditions a metallographic cross-section analysis of the sample is required. The aim of this work is to present some internal and external observable nonconformities which frequently appear in electronic assemblies. In order to detect these nonconformities, optical microscopy, cross section analysis, FTIR-microscopy and scanning electron microscopy with energy dispersive spectrometry (SEM-EDS) were used as analytical techniques.
Technical Library | 2017-06-22 17:11:53.0
C-mode scanning acoustic microscopy (C-SAM) is a non-destructive inspection technique showing the internal features of a specimen by ultrasound. The C-SAM is the preferred method for finding “air gaps” such as delamination, cracks, voids, and porosity. This paper presents evaluations performed on various advanced packages/assemblies especially flip-chip die version of ball grid array/column grid array (BGA/CGA) using C-SAM equipment. For comparison, representative x-ray images of the assemblies were also gathered to show key defect detection features of the two non-destructive techniques.
Technical Library | 2014-07-02 16:46:09.0
Growth behaviors of intermetallic compounds (IMCs) and Kirkendall voids in Cu/Sn/Cu microbump were systematically investigated by an in-situ scanning electron microscope observation. Cu–Sn IMC total thickness increased linearly with the square root of the annealing time for 600 h at 150°C, which could be separated as first and second IMC growth steps. Our results showed that the growth behavior of the first void matched the growth behavior of second Cu6Sn5, and that the growth behavior of the second void matched that of the second Cu3Sn. It could be confirmed that double-layer Kirkendall voids growth kinetics were closely related to the Cu–Sn IMC growth mechanism in the Cu/Sn/Cu microbump, which could seriously deteriorate the mechanical and electrical reliabilities of the fine-pitch microbump systems
Technical Library | 2014-06-12 16:40:19.0
Occurrence of popcorn in IC packages while assembling them onto the PCB is a well known moisture sensitive reliability issues, especially for surface mount packages. Commonly reflow soldering simulation process is conducted to assess the impact of assembling IC package onto PCB. A strain gauge-based instrumentation is developed to investigate the popcorn effect in surface mount packages during reflow soldering process. The instrument is capable of providing real-time quantitative information of the occurrence popcorn phenomenon in IC packages. It is found that the popcorn occur temperatures between 218 to 241°C depending on moisture soak condition, but not at the peak temperature of the reflow process. The presence of popcorn and delamination are further confirmed by scanning acoustic tomography as a failure analysis.
WASET - World Academy of Science, Engineering and Technology
Technical Library | 2015-02-12 16:57:56.0
Electronic systems are known to be affected by the environmental and mechanical conditions, such as humidity, temperature, thermal shocks and vibration. These adverse environmental operating conditions, with time, could degrade the mechanical efficiency of the system and might lead to catastrophic failures.The aim of this study is to investigate the mechanical integrity of lead-free ball grid array (BGA) solder joints subjected to isothermal ageing at 150°C for up to 1000 hours. Upon ageing at 150°C the Sn-3.5Ag solder alloy initially age-softened for up to 200 hours. This behaviour was linked to the coarsening of grains. When aged beyond 200 hours the shear strength was found to increase up to 400 hours. This age-hardening was correlated with precipitation of hard Ag3Sn particles in Sn matrix. Further ageing resulted in gradual decrease in shear strength. This can be explained as the combined effect of precipitation coarsening and growth of intermetallic layer. The fractured surfaces of the broken solder balls were also investigated under a Scanning Electron Microscope. The shear failures were generally due to ductile fractures in bulk solders irrespective of the ageing time.
Technical Library | 2017-04-20 13:51:14.0
The one constant in electronics manufacturing is change. Moore's Law, which successfully predicted a rate of change at which transistor counts doubled on Integrated Circuits (ICs) at lower cost for decades, is ceding to be an appropriate prediction tool. Increasing technical and economic requirements, deriving from the semiconductor environment, are cascaded down to the printed circuit and in particular to the IC substrate manufacturers. This is both a challenge and an opportunity for IC Substrate manufacturers, when dealing with the demands of the packaging market. (...)This paper introduces two new electroless copper baths developed for IC substrates manufacturing based on Semi Additive Process (SAP) technology (hereafter referred to as E'less Copper IC) and HDI production (hereafter referred to as E'less Copper HDI) and optimized for high throw into BMVs. An introduction to reliable throwing power measurement methods based on scanning electron microscope (SEM) is given, followed by a compilation and discussion of key performance criteria for each application, namely throwing power, copper adhesion on the substrate, dry film adhesion and reliability.
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