Technical Library | 2023-12-15 03:06:24.0
The first process in the SMT industry is solder paste printing. After the solder paste printing is completed, electronic components are attached to PCB pads through a SMT machine, and then reflow soldered. A preliminary PCB board is roughly processed. SMT is a combination of multiple devices, and such a line is called an SMT production line. Our common PCBA is processed through this process. In SMT technology, each process is very important, and poor quality can be caused by different process defects. Today, we are discussing the causes and countermeasures of SMT printing collapse.
Technical Library | 2016-11-30 21:30:50.0
Mid-chip solder balling is a defect typically associated with solder paste exhibiting poor hot slump and/or insufficient wetting during the reflow soldering process, resulting in paste flowing under the component or onto the solder resist. Once molten, this solder is compressed and forced to the side of the component, causing mid-chip solder balling.This paper documents the experimental work performed to further understand the impact on mid-chip solder balling from both the manufacturing process and the flux chemistry.
Technical Library | 2013-03-27 23:43:40.0
Vapor phase, once cast to the annals’ of history is making a comeback. Why? Reflow technology is well developed and has served the industry for many years, it is simple and it is consistent. All points are true – when dealing with the centre section of the bell curve. Today’s PCB manufacturers are faced with many designs which no longer fall into that polite category but rather test the process engineering groups with heavier and larger panels, large ground planes located in tricky places, component mass densities which are poorly distributed, ever changing Pb Free alloys and higher process temperatures. All the time the costs for the panels increase, availability of “process trial” boards diminishes and yields are expected to be extremely high with zero scrap rates. The final process in the assembly line has the capacity to secure all the value of the assembly or destroy it. If a panel is poorly soldered due to poor Oven setup or incorrect programming of the profile the recovery of the panel is at best expensive, at worst a loss. For these challenges people are turning to Vapor Phase.
Technical Library | 2022-03-16 19:48:18.0
Dendrites, Electrochemical Migration (ECM) and parasitic leakage, are usually caused by process related contamination. For example, excess flux, poor handling, extraneous solder, fibers, to name a few. One does not normally relate these fails with environmental causes. However, creep corrosion is a mechanism by which electronic products fail in application, primarily related to sulfur pollution present in the air.1 The sulfur reacts with exposed silver, and to a lesser extent, exposed copper. This paper will explore various aspects of the creep corrosion chemical reaction
Technical Library | 2021-04-08 00:34:16.0
Creep corrosion is not a new phenomenon, it has become more prevalent since the enactment of the European Union's Restriction of Hazardous Substance (RoHS) Directive on 1 July 2006. The directive bans the use of lead and other hazardous substances in products (where lead-based surface finishes offered excellent corrosion resistance). The higher melting temperatures of the lead-free solders and their poor wetting of copper metallization on PCBs forced changes to PCB laminates, surface finishes and processing temperature-time profiles. As a result, printed circuit boards might have higher risk of creep corrosion.
Technical Library | 2023-09-26 19:14:44.0
The transition from tin-lead to lead free soldering in the electronics manufacturing industry has been in progress for the past 10 years. In the interim period before lead free assemblies are uniformly accepted, mixed formulation solder joints are becoming commonplace in electronic assemblies. For example, area array components (BGA/CSP) are frequently available only with lead free Sn-Ag-Cu (SAC) solder balls. Such parts are often assembled to printed circuit boards using traditional 63Sn-37Pb solder paste. The resulting solder joints contain unusual quaternary alloys of Sn, Ag, Cu, and Pb. In addition, the alloy composition can vary across the solder joint based on the paste to ball solder volumes and the reflow profile utilized. The mechanical and physical properties of such Sn-Ag-Cu-Pb alloys have not been explored extensively in the literature. In addition, the reliability of mixed formulation solder joints is poorly understood.
Technical Library | 2020-10-18 19:35:05.0
Interconnect reliability especially in BGA solder joints and compliant pins are subjected to design parameters which are very critical to ensure product performance at pre-defined shipping condition and user environment. Plating thickness of compliant pin and damping mechanism of electronic system design are key successful factors for this purpose. In additional transportation and material handling process of a computer server system will be affected by shock under certain conditions. Many accessories devices in the server computer system tend to become loose resulting in poor contact or solder intermittent interconnect problems due to the shock load from the transportation and material handling processes.
Technical Library | 2013-12-27 10:39:21.0
The head-in-pillow defect has become a relatively common failure mode in the industry since the implementation of Pb-free technologies, generating much concern. A head-in-pillow defect is the incomplete wetting of the entire solder joint of a Ball-Grid Array (BGA), Chip-Scale Package (CSP), or even a Package-On-Package (PoP) and is characterized as a process anomaly, where the solder paste and BGA ball both reflow but do not coalesce. When looking at a cross-section, it actually looks like a head has pressed into a soft pillow. There are two main sources of head-in-pillow defects: poor wetting and PWB or package warpage. Poor wetting can result from a variety of sources, such as solder ball oxidation, an inappropriate thermal reflow profile or poor fluxing action. This paper addresses the three sources or contributing issues (supply, process & material) of the head-in-pillow defects. It will thoroughly review these three issues and how they relate to result in head-in pillow defects. In addition, a head-in-pillow elimination plan will be presented with real life examples will be to illustrate these head-in-pillow solutions.
Technical Library | 2018-09-26 20:33:26.0
Bottom terminated components, or BTCs, have been rapidly incorporated into PCB designs because of their low cost, small footprint and overall reliability. The combination of leadless terminations with underside ground/thermal pads have presented a multitude of challenges to PCB assemblers, including tilting, poor solder fillet formation, difficult inspection and – most notably – center pad voiding. Voids in large SMT solder joints can be difficult to predict and control due to the variety of input variables that can influence their formation. Solder paste chemistries, PCB final finishes, and reflow profiles and atmospheres have all been scrutinized, and their effects well documented. Additionally, many of the published center pad voiding studies have focused on optimizing center pad footprint and stencil aperture designs. This study focuses on I/O pad stencil modifications rather than center pad modifications. It shows a no-cost, easily implemented I/O design guideline that can be deployed to consistently and repeatedly reduce void formation on BTC-style packages.
Technical Library | 2021-11-03 17:05:39.0
Additively printed circuits provide advantages in reduced waste, rapid prototyping, and versatile flexible substrate choices relative to conventional circuit printing. Copper (Cu) based inks along with intense pulsed light (IPL) sintering can be used in additive circuit printing. However, IPL sintered Cu typically suffer from poor solderability due to high roughness and porosity. To address this, hybrid Cu ink which consists of Cu precursor/nanoparticle was formulated to seed Cu species and fill voids in the sintered structure. Nickel (Ni) electroplating was utilized to further improve surface solderability. Simulations were performed at various electroplating conditions and Cu cathode surface roughness using the multi-physics finite element method. By utilizing a mask during IPL sintering, conductivity was induced in exposed regions; this was utilized to achieve selective Ni-electroplating. Surface morphology and cross section analysis of the electrodes were observed through scanning electron microscopy and a 3D optical profilometer. Energy dispersive X-ray spectroscopy analysis was conducted to investigate changes in surface compositions. ASTM D3359 adhesion testing was performed to examine the adhesion between the electrode and substrate. Solder-electrode shear tests were investigated with a tensile tester to observe the shear strength between solder and electrodes. By utilizing Cu precursors and novel multifaceted approach of IPL sintering, a robust and solderable Ni electroplated conductive Cu printed electrode was achieved.
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