Technical Library | 2024-02-05 17:51:01.0
Objective: Drying = reducing the humidity in PCB before soldering Preventing delamination caused by thermal stress after moisture absorption Methods: Drying in convection and/ or vacuum oven Parameters subject to material type, soldering surface, layer count, time to soldering, layout (copper-plated areas)
Technical Library | 2016-05-12 16:29:40.0
Advances in miniaturized electronic devices have led to the evolution of microvias in high density interconnect (HDI) circuit boards from single-level to stacked structures that intersect multiple HDI layers. Stacked microvias are usually filled with electroplated copper. Challenges for fabricating reliable microvias include creating strong interface between the base of the microvia and the target pad, and generating no voids in the electrodeposited copper structures. Interface delamination is the most common microvia failure due to inferior quality of electroless copper, while microvia fatigue life can be reduced by over 90% as a result of large voids, according to the authors’ finite element analysis and fatigue life prediction. This paper addresses the influence of voids on reliability of microvias, as well as the interface delamination issue.
Technical Library | 2009-04-30 18:06:24.0
This presentation surveys the most significant via and via-related laminate failure mechanisms from past to present using data from current induced thermal cycling (CITC) testing, failure analysis, and other sources. The relative life and failure modes of thru vias, buried vias, and microvias (stacked vs. non-stacked) are compared, along with the affect of structure, materials, and peak temperatures on the above. The origin of via-induced laminate failures such as "eyebrow cracks" and Pb free related internal delamination is also explored.
Technical Library | 2021-08-11 01:00:37.0
Conformal coatings and potting materials continue to create issues for the electronics industry. This webinar will dig deeper into the failure modes of these materials, specifically issues with Coefficient of Thermal Expansion (CTE), delamination, cracking, de-wetting, pinholes/bubbles and orange peel issues with conformal coatings and what mitigation techniques are available. Similarly, this webinar will look at the failure modes of potting materials, (e.g Glass Transition Temperature (Tg), PCB warpage, the effects of improper curing and potential methods for correcting these situations.
Technical Library | 2017-06-22 17:11:53.0
C-mode scanning acoustic microscopy (C-SAM) is a non-destructive inspection technique showing the internal features of a specimen by ultrasound. The C-SAM is the preferred method for finding “air gaps” such as delamination, cracks, voids, and porosity. This paper presents evaluations performed on various advanced packages/assemblies especially flip-chip die version of ball grid array/column grid array (BGA/CGA) using C-SAM equipment. For comparison, representative x-ray images of the assemblies were also gathered to show key defect detection features of the two non-destructive techniques.
Technical Library | 2014-06-12 16:40:19.0
Occurrence of popcorn in IC packages while assembling them onto the PCB is a well known moisture sensitive reliability issues, especially for surface mount packages. Commonly reflow soldering simulation process is conducted to assess the impact of assembling IC package onto PCB. A strain gauge-based instrumentation is developed to investigate the popcorn effect in surface mount packages during reflow soldering process. The instrument is capable of providing real-time quantitative information of the occurrence popcorn phenomenon in IC packages. It is found that the popcorn occur temperatures between 218 to 241°C depending on moisture soak condition, but not at the peak temperature of the reflow process. The presence of popcorn and delamination are further confirmed by scanning acoustic tomography as a failure analysis.
WASET - World Academy of Science, Engineering and Technology
Technical Library | 2015-05-21 18:46:31.0
In this work the reliability of an embedded planar capacitor laminate under temperature and voltage stress is investigated. The capacitor laminate consisted of an epoxy-BaTiO3 composite sandwiched between two layers of copper. The test vehicle with the embedded capacitors was subjected to a temperature of 125oC and a voltage bias of 200 V for 1000 hours. Capacitance, dissipation factor, and insulation resistance were monitored in-situ. Failed capacitors exhibited a sharp drop in insulation resistance, indicating avalanche breakdown. The decrease in the capacitance after 1000 hours was no more than 8% for any of the devices monitored. The decrease in the capacitance was attributed to delamination in the embedded capacitor laminate and an increase in the spacing between the copper layers.
Technical Library | 2021-03-04 15:16:27.0
Out-of-plane wrinkling has a significant influence on the mechanical performance of composite laminates. Numerical simulations were conducted to investigate the progressive failure behavior of fiber-reinforced composite laminates with out-of-plane wrinkle defects subjected to axial compression. To describe the material degradation, a three-dimensional elastoplastic damage model with four damage modes (i.e., fiber tensile failure, matrix failure, fiber kinking/splitting, and delamination) was developed based on the LaRC05 criterion. To improve the computational efficiency in searching for the fracture angle in the matrix failure analysis, a high-efficiency and robust modified algorithm that combines the golden section search method with an inverse interpolation based on an existing study is proposed.
Technical Library | 2024-01-08 18:36:01.0
The following aims lie behind the investigations described: The circuit board is an integrated structure made of metal and plastic. Like most integrated components enclosed in plastic, it absorbs water. When it is rapidly heated as, for example, in soldering technology temperature processes, it is a well known fact that the water will evaporate abruptly, leading to destruction. It is therefore essential that the circuit board be dried before these soldering processes. Circuit board manufacturers are extremely hesitant at providing instructions on drying their circuit boards. Information from the ZVEI [1] should also be regarded critically. The cardinal problem is the high temperature which is recommended for baking. If this is applied, the result is often de-lamination and distortion of the circuit boards. Corrosion and the formation of intermetallic phases of the metallic surfaces are also to be expected. The following investigates whether gentle drying at 45°C or 60°C and at low relative humidity achieves the same result as baking at high temperatures. The industry provides novel dry cabinets which are suitable for rapid drying at relative humidities below one percent.
Technical Library | 2018-09-21 10:12:53.0
Moisture accumulates during storage and industry practice recommends specific levels of baking to avoid delamination. This paper will discuss the use of capacitance measurements to follow the absorption and desorption behaviour of moisture. The PCB design used in this work, focused on the issue of baking out moisture trapped between copper planes. The PCB was designed with different densities of plated through holes and drilled holes in external copper planes, with capacitance sensors located on the inner layers. For trapped volumes between copper planes, the distance between holes proved to be critical in affecting the desorption rate. For fully saturated PCBs, the desorption time at elevated temperatures was observed to be in the order of hundreds of hours. Finite difference diffusion modelling was carried out for moisture desorption behaviour for plated through holes and drilled holes in copper planes. A meshed copper plane was also modelled evaluating its effectiveness for assisting moisture removal and decreasing bake times. Results also showed, that in certain circumstances, regions of the PCB under copper planes initially increase in moisture during baking.
