Technical Library | 1999-08-05 10:45:36.0
In 1998, the International 300 mm Initiative (I300I) demonstration and characterization programs will focus on 180 nm technology capability. To support these activities, I300I and equipment supplier demonstration partners must use starting silicon wafers with key parameters specified at a level appropriate level for 180 nm processing, including contamination and lithographic patterning. This document describes I300I's silicon wafer specifications, as developed with the I300I Silicon Working Group (member company technical advisors) and SEMI Standards.
Technical Library | 2013-03-04 16:51:00.0
Chip-scale (or chip-size) packages are rapidly becoming an important element in electronics due to their size, performance, and cost advantages [Hou, 1998]. The Chip Scale Package (CSP) is becoming a key semiconductor package type, particularly for consumer products. Due to their relatively smaller size, new challenges are presented in the rework and repair of CSPs. (...) The specific focus of this paper is the removal process for rework of CSPs and the site scavenging methods required to properly prepare the circuit board for a new component. Process factors such as the heating, fluxing and, atmosphere are discussed.
| 1 |
