Technical Library | 2023-07-22 02:26:05.0
Patch offset; Uneven patches throughout the substrate (each substrate is offset in a different way); Only part of the substrate is offset; Only certain components are offset; The patch Angle is offset; Component absorption error; Laser identification (component identification) error; Nozzle loading and unloading error; Mark (BOC mark, IC mark) identification error; Image recognition error (KE-2060 only); Analysis of the main reasons for throwing material. More information about KINGSUN please Contact US at jenny@ksunsmt.com or visit www.ksunsmt.com
Technical Library | 2011-11-25 16:07:47.0
The article presents virtual and real investigations related to current capacity and fusing of PCB traces in high power applications and is based on a scientific paper delivered by authors at SIITME 2010 in Romania. The reason of performing the research a
Technical Library | 2011-12-08 17:46:42.0
The past few years have brought PCB assemblers a multitude of choices for SMT stencil materials and coatings. In addition to the traditional laser-cut stainless steel (SS) or electroformed nickel, choices now include SS that has been optimized for laser c
Technical Library | 2015-11-05 15:09:27.0
There has been recent activity and interest in Laser-Cut Electroform blank foils as an alternative to normal Electroform stencils. The present study will investigate and compare the print performance in terms of % paste transfer as well the dispersion in paste transfer volume for a variety of Electroform and Laser-Cut stencils with and without post processing treatments. Side wall quality will also be investigated in detail. A Jabil solder paste qualification test board will be used as the PCB test vehicle.
Technical Library | 2019-09-11 23:33:04.0
There are numerous techniques to singulate printed circuit boards after assembly including break-out, routing, wheel cutting and now laser cutting. Lasers have several desirable advantages such as very narrow kerf widths as well as virtually no dust, no mechanical stress, visual pattern recognition and fast set-up changes. The very narrow kerf width resulting from laser ablation and the very tight tolerance of the cutting path placement allows for more usable space on the panel. However, the energy used in the laser cutting process can also create unwanted products on the cut walls as a result of the direct laser ablation. The question raised often is: What are these products, and how far can the creation of such products be mitigated through variation of the laser cutting process, laser parameters and material handling? This paper discusses the type and quantity of the products found on sidewalls of laser depaneled circuit boards and it quantifies the results through measurements of breakdown voltage, as well as electrical impedance. Further this paper discusses mitigation strategies to prevent or limit the amount of change in surface quality as a result of the laser cutting process. Depending on the final application of the circuit board it may prompt a need for proper specification of the expected results in terms of cut surface quality. This in turn will impact the placement of runs and components during layout. It will assist designers and engineers in defining these parameters sufficiently in order to have a predictable quality of the circuit boards after depaneling.
Technical Library | 2010-11-16 12:06:38.0
The Net Tie is a component type which allows for shorting together various nets in a design. The graphic for the symbol can be as simple as two component pins representing a virtual component between nets or as complex as mutipul pins (as many as desired)
Technical Library | 2010-12-22 13:59:14.0
This paper discusses polymer based nanogels, nanofluids and nanopastes for thermal interface material (TIM) applications. Nanopaste and nanogel formulated using controlled-sized particles to fill small bond lines is highlighted.
Technical Library | 2010-09-09 16:44:48.0
The effectiveness of cleaning stencils and misprinted/dirty printed circuit boards can be effectively monitored. This can be done by washing known clean circuit boards and then checking to see if they have stayed clean as a result of the washing process.
Technical Library | 2021-12-21 23:15:44.0
High Density Interconnect (HDI) technologies are being used widely in Asia and Europe in consumer electronics for portable wireless communication and computing, digital imaging, and chip packaging. Although North America lags behind in developing process capability for this technology, HDI will become a significant business segment for North America. For this to happen, the printed circuit board shops will have to become process capable in fabricating fine lines and spaces, and also be capable in forming and plating microvias.
Technical Library | 2010-01-19 19:12:08.0
Learn how Trace, Track and Control (TTC) solutions help manufacturers cut cost, cut waste, automate critical manufacturing processes, and increase yields—all critical elements in today’s economic environment.
