Technical Library: asm and wire and bonder and parts (Page 1 of 1)

Assembly and Reliability of 1704 I/O FCBGA and FPBGAs

Technical Library | 2013-03-14 17:19:28.0

Commercial-off-the-shelf ball/column grid array packaging (COTS BGA/CGA) technologies in high reliability versions are now being considered for use in a number of National Aeronautics and Space Administration (NASA) electronic systems. Understanding the process and quality assurance (QA) indicators for reliability are important for low-risk insertion of these advanced electronic packages. This talk briefly discusses an overview of packaging trends for area array packages from wire bond to flip-chip ball grid array (FCBGA) as well as column grid array (CGA). It then presents test data including manufacturing and assembly board-level reliability for FCBGA packages with 1704 I/Os and 1-mm pitch, fine pitch BGA (FPBGA) with 432 I/Os and 0.4-mm pitch, and PBGA with 676 I/Os and 1.0-mm pitch packages. First published in the 2012 IPC APEX EXPO technical conference proceedings.

Jet Propulsion Laboratory

Microspring Characterization and Flip-Chip Assembly Reliability

Technical Library | 2014-05-29 13:48:14.0

Electronics packaging based on stress-engineered spring interconnects has the potential to enable integrated IC testing, fine pitch, and compliance not readily available with other technologies. We describe new spring contacts which simultaneously achieve low resistance ( 30 μm) in dense 2-D arrays (180 ~ 180-µm pitch). Mechanical characterization shows that individual springs operate at approximately 150-µN force. Electrical measurements and simulations imply that the interface contact resistance contribution to a single contact resistance is This paper suggests that integrated testing and packaging can be performed with the springs, enabling new capabilities for markets such as multichip modules.

Institute of Electrical and Electronics Engineers (IEEE)

Status and Outlooks of Flip Chip Technology

Technical Library | 2018-11-14 21:43:14.0

Status of flip chip technology such as wafer bumping, package substrate, flip chip assembly, and underfill will be reviewed in this study. Emphasis is placed on the latest developments of these areas in the past few years. Their future trends will also be recommended. Finally, the competition on flip chip technology will be briefly mentioned.

ASM Pacific Technology

Influence of Nanoparticles, Low Melting Point (LMP) Fillers, and Conducting Polymers on Electrical, Mechanical, and Reliability Performance of Micro-Filled Conducting Adhesives for Z-Axis Interconnections

Technical Library | 2007-11-01 17:16:07.0

This paper discusses micro-filled epoxy-based conducting adhesives modified with nanoparticles, conducting polymers, and low melting point (LMP) fillers for z-axis interconnections, especially as they relate to package level fabrication, integration,

i3 Electronics

Challenges on ENEPIG Finished PCBs: Gold Ball Bonding and Pad Metal Lift

Technical Library | 2017-09-07 13:56:11.0

As a surface finish for PCBs, Electroless Nickel/Electroless Palladium/Immersion Gold (ENEPIG) was selected over Electroless Nickel/Immersion Gold (ENIG) for CMOS image sensor applications with both surface mount technology (SMT) and gold ball bonding processes in mind based on the research available on-line. Challenges in the wire bonding process on ENEPIG with regards to bondability and other plating related issues are summarized.

Teledyne DALSA

Reliability and Failure Mechanisms of Laminate Substrates in a Pb-free World

Technical Library | 2009-04-30 18:06:24.0

This presentation surveys the most significant via and via-related laminate failure mechanisms from past to present using data from current induced thermal cycling (CITC) testing, failure analysis, and other sources. The relative life and failure modes of thru vias, buried vias, and microvias (stacked vs. non-stacked) are compared, along with the affect of structure, materials, and peak temperatures on the above. The origin of via-induced laminate failures such as "eyebrow cracks" and Pb free related internal delamination is also explored.

i3 Electronics

Defect Features Detected by Acoustic Emission for Flip-Chip CGA/FCBGA/PBGA/FPBGA Packages and Assemblies

Technical Library | 2017-06-22 17:11:53.0

C-mode scanning acoustic microscopy (C-SAM) is a non-destructive inspection technique showing the internal features of a specimen by ultrasound. The C-SAM is the preferred method for finding “air gaps” such as delamination, cracks, voids, and porosity. This paper presents evaluations performed on various advanced packages/assemblies especially flip-chip die version of ball grid array/column grid array (BGA/CGA) using C-SAM equipment. For comparison, representative x-ray images of the assemblies were also gathered to show key defect detection features of the two non-destructive techniques.

Jet Propulsion Laboratory

Design and Experiment of a Moving Magnet Actuator Based Jetting Dispenser

Technical Library | 2021-01-13 21:29:27.0

Developing actuators to drive high-frequency jetting dispensers in the dispensing technology for electronic assembly applications has become a concern in recent years. This study proposed a new jetting dispenser without a displacement amplification mechanism directly actuated by a moving magnet actuator (MMA) to jet small fluid droplets. In this article, the main geometric dimensions of ...

National Cheng Kung University

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