Technical Library: cap (Page 1 of 1)

Decapsulation of Integrated Circuits

Technical Library | 2019-05-24 09:27:33.0

Decapsulation, or de-cap, is a failure analysis technique which involves the removal of material packaging from an integrated circuit (IC). After de-cap, visual inspection by optical microscopy of the internal circuitry may reveal areas where damage is most likely to have occurred. In addition, scanning electron microscopy (SEM) with energy dispersive x-ray spectroscopy (EDS) can identify the composition of any anomalies present after de-cap under higher magnification. The removal process of package material can be done either mechanically or chemically depending on the design of the integrated circuit. With ceramic packaging, de-cap is usually done mechanically by chiseling off the top with a fine razor and small hammer. For plastic packaging, de-cap requires chemical etching by strong acids. In this Tech Tips article, de-cap by chemical etching will be outlined step by step.

ACI Technologies, Inc.

Decapsulation of Integrated Circuits

Technical Library | 2019-05-29 10:38:59.0

Decapsulation, or de-cap, is a failure analysis technique which involves the removal of material packaging from an integrated circuit (IC). After de-cap, visual inspection by optical microscopy of the internal circuitry may reveal areas where damage is most likely to have occurred. In addition, scanning electron microscopy (SEM) with energy dispersive x-ray spectroscopy (EDS) can identify the composition of any anomalies present after de-cap under higher magnification. The removal process of package material can be done either mechanically or chemically depending on the design of the integrated circuit. With ceramic packaging, de-cap is usually done mechanically by chiseling off the top with a fine razor and small hammer. For plastic packaging, de-cap requires chemical etching by strong acids. In this Tech Tips article, de-cap by chemical etching will be outlined step by step.

ACI Technologies, Inc.

Reworking ALD Coatings

Technical Library | 2020-09-02 14:34:23.0

Atomic layer deposition (ALD) is a process of creating coatings on a molecular layer by layer basis. Using an iterated sequence of self-saturating deposition cycles that are self-terminating, a single layer can be deposited at a time, allowing for highly uniform films with complete conformality. The composition of the film typically used for coating printed wiring boards (PWBs) is a high alumina (Al2O3) sequential deposition of alumina and titania capped with a corrosion protective titanium aluminate layer, most notably ALD-Cap from Sundew Technologies, LLC. Rework is a process of restoring an electronics assembly to full functionality to prolong equipment life and reduce the amount of scrap. The process typically involves:

ACI Technologies, Inc.

Component Shortages Causing Electronics Manufacturers to "Use All Means Necessary" to Ship Products

Technical Library | 2010-11-24 20:47:38.0

As the electronics manufacturing and assembly industry in the US recovers to some degree from the economic crisis which began in 2008, the challenge of component shortages has risen to the top as one of the stumbling blocks for contract assemblers and cap

BEST Inc.

Via Filling Applications in Practice

Technical Library | 2020-07-15 18:49:03.0

Via Filling • Through Hole Vias - IPC-4761 – Plugging – Filling – Filled & Capped • MicroviaFilling and Stacked Vias

Würth Elektronik GmbH & Co. KG

Fill the Void IV: Elimination of Inter-Via Voiding

Technical Library | 2019-10-10 00:26:28.0

Voids are a plague to our electronics and must be eliminated! Over the last few years we have studied voiding in solder joints and published three technical papers on methods to "Fill the Void." This paper is part four of this series. The focus of this work is to mitigate voids for via in pad circuit board designs. Via holes in Quad Flat No-Lead (QFN) thermal pads create voiding issues. Gasses can come out of via holes and rise into the solder joint creating voids. Solder can also flow down into the via holes creating gaps in the solder joint. One method of preventing this is via plugging. Via holes can be plugged, capped, or left open. These via plugging options were compared and contrasted to each other with respect to voiding. Another method of minimizing voiding is through solder paste stencil design. Solder paste can be printed around the via holes with gas escape routes. This prevents gasses from via holes from being trapped in the solder joint. Several stencil designs were tested and voiding performance compared and contrasted. In many cases voiding will be reduced only if a combination of mitigation strategies are used. Recommendations for combinations of via hole plugging and stencil design are given. The aim of this paper is to help the reader to "Fill the Void."

FCT ASSEMBLY, INC.

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