Technical Library | 2009-09-18 14:42:37.0
In recent years, various studies have been issued on cleaning under low standoff components; most however, with incomplete information. It is essential to revisit and describe the latest challenges in the market, identifying obvious gaps in available information. Such information is crucial for potential and existing users to fully address the cleanliness levels under their respective components. With the emergence of lead-free soldering and even smaller components, new challenges have arisen including cleaning in gaps of less than 1-mil.
Technical Library | 2020-11-04 17:49:45.0
OEMs and CMs designing and building electronic assemblies for high reliability applications are typically faced with a decision to clean or not to clean the assembly. If ionic residues remain on the substrate surface, potential failure mechanisms, including dendritic growth by electrochemical migration reaction and leakage current, may result. These failures have been well documented. If a decision to clean substrates is made, there are numerous cleaning process options available. For defluxing applications, the most common systems are spray-in-air, employing either batch or inline cleaning equipment and an engineered aqueous based cleaning agent. Regardless of the type of cleaning process adopted, effective cleaning of post solder residue requires chemical, thermal and mechanical energies. The chemical energy is derived from the engineered cleaning agent; the thermal energy from the increased temperature of the cleaning agent, and the mechanical energy from the pump system employed within the cleaning equipment. The pump system, which includes spray pressure, spray bar configuration and nozzle selection, is optimized for the specific process to create an efficient cleaning system. As board density has increased and component standoff heights have decreased, cleaning processes are steadily challenged. Over time, cleaning agent formulations have advanced to match new solder paste developments, spray system configurations have improved, and wash temperatures (thermal energy) have been limited to a maximum of 160ºF. In most cases, this is due to thermal limitations of the materials used to build the polymer-based cleaning equipment. Building equipment out of stainless steel is an option, but one that may be cost prohibitive. Given the maximum allowable wash temperature, difficult cleaning applications are met by increasing the wash exposure time; including reducing the conveyor speed of inline cleaners or extending wash time in batch cleaners. Although this yields effective cleaning results, process productivity may be compromised. However, high temperature resistant polymer materials, capable of withstanding a 180°F wash temperature, are now available and can be used in cleaning equipment builds. For this study, the authors explored the potential for increasing cleaning process efficiency as a result of an increase in thermal energy due to the use of higher wash temperature. The cleaning equipment selected was an inline cleaner built with high temperature resistant polymer material. For the analysis, standard substrates were used. These were populated with numerous low standoff chip cap components and soldered with both no-clean tin-lead and lead-free solder pastes. Two aqueous based cleaning agents were selected, and multiple wash temperatures and wash exposure times were evaluated. Cleanliness assessments were made through visual analysis of under-component inspection, as well as localized extraction and Ion Chromatography in accordance with current IPC standards.
Technical Library | 2019-08-01 10:58:32.0
Optical fibers transmit information in the form of pulses of light. The advantages of optical fibers over traditional copper wires include: higher throughput, greater signal distance and speed, smaller cable mass and diameter, greater pull tension limit, and resistance to electromagnetic interference (EMI) and radio frequency interference(RFI). The disadvantages of fiber optics when compared to copper wires include: end-face defects, cleanliness, and the ease of attaching connectors to electronics assemblies (Figure 1).
Technical Library | 2020-03-01 23:06:45.0
For though hole soldering, no matter it's wave soldering or selective soldering, the process is same formed by fluxing,preheating,soldering. How these 3 process will change the soldering result? When you face the soldering defects, what could be the reasons caused these and how to debug them? With below information you may get some hints.
Technical Library | 2010-06-10 21:01:48.0
This paper researches the effectiveness of the R.O.S.E. cleanliness testing process for dissolving and measuring ionic contaminants from boards soldered with no-clean and lead-free flux technologies.
Technical Library | 2010-09-16 18:45:06.0
With PCB complexity and density increasing and also wider use of 3D devices, tougher requirements are now imposed on device inspection both during original manufacture and at their subsequent processing onto printed circuit boards. More complicated and de
Technical Library | 2013-02-07 17:01:46.0
Silicone contamination is known to have a negative impact on assembly processes such as soldering, adhesive bonding, coating, and wire bonding. In particular, silicone is known to cause de-wetting of materials from surfaces and can result in adhesive failures. There are many sources for silicone contamination with common sources being mold releases or lubricants on manufacturing tools, offgassing during cure of silicone paste adhesives, and residue from pressure sensitive tape. This effort addresses silicone contamination by quantifying adhesive effects under known silicone contaminations. The first step in this effort identified an FT-IR spectroscopic detection limit for surface silicone utilizing the area under the 1263 cm-1 (Si-CH3) absorbance peak as a function of concentration (µg/cm2). The next step was to pre-contaminate surfaces with known concentrations of silicone oil and assess the effects on surface wetting and adhesion. This information will be used to establish guidelines for silicone contamination in different manufacturing areas within Harris Corporation... First published in the 2012 IPC APEX EXPO technical conference proceedings.
Technical Library | 2020-12-24 02:50:56.0
A method for packaging integrated circuit silicon die in thin flexible circuits has been investigated that enables circuits to be subsequently integrated within textile yarns. This paper presents an investigation into the required materials and component dimensions in order to maximize the reliability of the packaging method. Two die sizes of 3.5 mm×8 mm× 0.53 mm and 2 mm×2 mm×0.1 mm have been simulated and evaluated experimentally under shear load and during bending. The shear and bending experimental results show good agreement with the simulation results and verify the simulated optimal thickness of the adhesive layer. Three underfill adhesives (EP30AO, EP37-3FLF, and Epo-Tek 301 2fl), three highly flexible adhesives (Loctite 4860, Loctite 480, and Loctite 4902), and three substrates (Kapton,Mylar, and PEEK) have been evaluated, and the optimal thickness of each is found. The Kapton substrate, together with the EP37-3FLF adhesive, was identified as the best materials combination with the optimum underfill and substrate thickness identified as 0.05 mm.
Technical Library | 2020-03-12 13:10:35.0
The electronics industry is further progressing in terms of smaller, faster, smarter and more efficient electronic devices. This continuous evolving environment caused the development on various electrolytic copper processes for different applications over the past several decades. (...) This paper describes the reasons for development and a roadmap of dimensions for copper filled through holes, microvias and other copper plated structures on PCBs.