Technical Library: dek and edge and clamps (Page 1 of 2)

Evaluation of Stencil Foil Materials, Suppliers and Coatings

Technical Library | 2011-12-08 17:46:42.0

The past few years have brought PCB assemblers a multitude of choices for SMT stencil materials and coatings. In addition to the traditional laser-cut stainless steel (SS) or electroformed nickel, choices now include SS that has been optimized for laser c

Shea Engineering Services

SMT Manufacturability and Reliability in PCB Cavities

Technical Library | 2012-05-31 18:01:31.0

First published in the 2012 IPC APEX EXPO technical conference proceedings. Considering technological advances in multi-depth cavities in the PCB manufacturing industry, various subtopics have materialized regarding the processing and application of such

AT&S

Screen-Printing Fabrication and Characterization of Stretchable Electronics

Technical Library | 2017-03-09 17:37:05.0

This article focuses on the fabrication and characterization of stretchable interconnects for wearable electronics applications. Interconnects were screen-printed with a stretchable silver-polymer composite ink on 50-μm thick thermoplastic polyurethane. The initial sheet resistances of the manufactured interconnects were an average of 36.2 mΩ/◽, and half the manufactured samples withstood single strains of up to 74%. The strain proportionality of resistance is discussed, and a regression model is introduced. Cycling strain increased resistance. However, the resistances here were almost fully reversible, and this recovery was time-dependent. Normalized resistances to 10%, 15%, and 20% cyclic strains stabilized at 1.3, 1.4, and 1.7. We also tested the validity of our model for radio-frequency applications through characterization of a stretchable radio-frequency identification tag.

Tampere University of Technology

Microspring Characterization and Flip-Chip Assembly Reliability

Technical Library | 2014-05-29 13:48:14.0

Electronics packaging based on stress-engineered spring interconnects has the potential to enable integrated IC testing, fine pitch, and compliance not readily available with other technologies. We describe new spring contacts which simultaneously achieve low resistance ( 30 μm) in dense 2-D arrays (180 ~ 180-µm pitch). Mechanical characterization shows that individual springs operate at approximately 150-µN force. Electrical measurements and simulations imply that the interface contact resistance contribution to a single contact resistance is This paper suggests that integrated testing and packaging can be performed with the springs, enabling new capabilities for markets such as multichip modules.

Institute of Electrical and Electronics Engineers (IEEE)

Fine Tuning The Stencil Manufacturing Process and Other Stencil Printing Experiments

Technical Library | 2013-11-21 12:01:11.0

Previous experimentation on a highly miniaturized and densely populated SMT assembly revealed the optimum stencil alloy and flux-repellent coating for its stencil printing process. Production implementation of the materials that were identified in the study resulted in approximately 5% print yield improvement across all assemblies throughout the operation, validating the results of the initial tests. A new set of studies was launched to focus on the materials themselves, with the purpose of optimizing their performance on the assembly line (...) Results of the prior tests are reviewed, and the new test vehicle, experimental setup and results are presented and discussed.

Shea Engineering Services

Screen and Stencil Printing Processes for Wafer Backside Coating

Technical Library | 2009-09-09 15:08:19.0

Stencil printing equipment has traditionally been used in the surface mount assembly industry for solder paste printing. In recent years the flexibility of the tool has been exploited for a wide range of materials and processes to aid semiconductor packaging and assembly. One such application has been the deposition of adhesive coatings onto the backside of silicon wafers.

ASM Assembly Systems (DEK)

Enhancing Thermal Performance in Embedded Computing for Ruggedized Military and Avionics Applications.

Technical Library | 2014-07-17 17:01:10.0

Embedded computing systems used in many military and avionics applications are trending toward higher heat fluxes, and as a result performance is being hindered by thermal limitations. This is intensified by the high ambient conditions experience by today’s modern warfighter. In many applications liquid cooling is replacing air flow through chassis for both thermal and environmental benefits(...) This paper outlines a series of passive thermal improvements which are easily integrated into legacy, or existing, systems and can provide a 3-4x increase in dissipated power.

Advanced Cooling Technologies

The Pin-in-Paste (or AART) Process for Odd Form and Through Hole Printed Circuit Boards

Technical Library | 2007-09-27 16:18:15.0

Considerable interest exists in the process known as the pinin- paste, or the Alternative Assembly and Reflow Technology (AART) process. The AART process allows for the simultaneous reflow of both odd-form and through hole devices as well as surface mount components. This process has several advantages over the typical mixed technology process sequence that includes wave soldering and/or hand soldering, often in addition to reflow soldering.

Universal Instruments Corporation

An Experimental and Computational Study of the Current Carrying Capacity of High Performance PWB Interconnections

Technical Library | 2009-01-01 16:37:38.0

Recent technology advancement has enabled enhancement in PWB electrical performance and wiring density. These innovations have taken the form of improved materials, novel PWB interconnect structures, and manufacturing technology. One such advancement is Z-axis conductive interconnect. The Z-interconnect technology involves building mini-substrates of 2 or 3 layers each, then assembling several mini-substrates together using conductive paste.

i3 Electronics

Advantages of Bismuth-based Alloys for Low Temperature Pb-Free Soldering and Rework

Technical Library | 2012-12-20 14:36:09.0

The increased function of personal electronic devices, such as mobile phones and personal music devices, has driven the need for smaller and smaller active and passive components. This trend toward miniaturization, occurring at the same time as the conversion to RoHS-compliant lead-free assembly, has been a considerable challenge to the electronics assembly industry. The main reason for this is the higher reflow process temperatures required for Pb-free assembly. These higher temperatures can thermally damage the PCB and the components. In addition, the higher reflow temperatures can negatively affect the solder joint quality, especially when coupled with the smaller paste deposits required for these smaller components. If additional thermal processing is required, the risk increases even more. First Published at SMTA's International Conference on Soldering and Reliability in Toronto, May 2011

Indium Corporation

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