Technical Library | 2016-04-08 01:19:52.0
PCB assembly designs become more complex year-on-year, yet early-stage form/fit compliance verification of all designed-in components to the intended manufacturing processes remains a challenge. So long as librarians at the design and manufacturing levels continue to maintain their own local standards for component representation, there is no common representation in the design-to-manufacturing phase of the product lifecycle that can provide the basis for transfer of manufacturing process rules to the design level. A comprehensive methodology must be implemented for all component types, not just the minority which happen to conform to formal packaging standards, to successfully left-shift assembly and test DFM analysis to the design level and thus compress NPI cycle times.(...)This paper will demonstrate the technological components of the working solution: the logic for deriving repeatable and standardized package and pin classifications from a common source of component physical-model content, the method for associating DFA and DFT rules to those classifications, and the transfer of those rules to separate DFM and NPI analysis tools elsewhere in the design-through-manufacturing chain resulting in a consistent DFM process across multiple design and manufacturing organizations.
Technical Library | 2023-11-20 17:30:11.0
Summary for today 1. Electronic component inspection and failure analysis. 2. Component counting and material management. 3. Reverse engineering. 4. Counterfeit detection. 5. Real-time defect verification. 6. Computed tomography (CT) techniques and how to differentiate between 2D, 2.5D, and 3D x-ray inspection. 7. Design for manufacturing (DFM) and design for x-ray inspection (DFXI). 8. Voids, bridging, and head-in-pillow failures in bottom terminated components (BTC). 9. Artificial Intelligence and x-ray inspection
Technical Library | 2021-12-27 13:28:49.0
Research Nester published a report titled "Oncology Information System Market: Global Demand Analysis & Opportunity Outlook 2030" which delivers a detailed overview of the global oncology information system market in terms of market segmentation by product, software, end-user, and by region.
Technical Library | 2010-04-22 14:55:51.0
It is now widely accepted that using designed experiments is the most effective way to optimize surface mount technology (SMT) processes. This situation begs the question "what is an effective strategy in implementing this powerful tool?" This paper will present such a strategy that incorporates Taguchi's approach for screening, full factorial analysis for optimization and central composite design for precise modeling. We will present these techniques using MINITABTM Release 13 statistical software and printed circuit board industry applications.
Technical Library | 2015-04-03 20:02:31.0
Understanding your process and how to minimize defects has always been important. Nowadays, its importance is increasing with the complexity of products and the customers demand for higher quality. Quality Management Solutions (QMS) that integrate real-time test and inspection results with engineering and production data, can allow the optimization of the entire manufacturing process. We will describe the cost and time benefits of a QMS system when integrated with engineering data and manufacturing processes. We will use real examples that can be derived from integrating this data. This paper also discusses the aspects of Quality Management Software that enables electronic manufacturers to efficiently deliver products while achieving higher quality, reduce manufacturing costs and cutting repair time. Key words: Quality Management Software, ICT, Repair workstations, First Pass Yield, Pareto analysis, Flying Probe, QMS.
Technical Library | 2013-02-08 22:56:47.0
Solder voiding is present in the majority solder joints and is generally accepted when the voids are small and the total void content is minimal. X-ray methods are the predominate method for solder void analysis but this method can be quite subjective for non grid array components due to the two dimensional aspects of X-ray images and software limitations. A novel method of making a copper "sandwich" to simulate under lead and under component environs during reflow has been developed and is discussed in detail. This method has enabled quantitative solder paste void analysis for lead free and specialty paste development and process refinement. Profile and paste storage effects on voiding are discussed. Additionally an optimal design and material selection from a solder void standpoint for a heat spreader on a BCC (Bumpered Chip Carrier) has been developed and is discussed.
Technical Library | 2020-03-04 23:53:17.0
Critical to maintaining quality control in high-throughput screening is the need for constant monitoring of liquid-dispensing fidelity. Traditional methods involve operator intervention with gravimetric analysis to monitor the gross accuracy of full plate dispenses, visual verification of contents, or dedicated weigh stations on screening platforms that introduce potential bottlenecks and increase the plate-processing cycle time. We present a unique solution using open-source hardware, software, and 3D printing to automate dispenser accuracy determination by providing real-time dispense weight measurements via a network-connected precision balance. This system uses an Arduino microcontroller to connect a precision balance to a local network. By integrating the precision balance as an Internet of Things (IoT) device, it gains the ability to provide real-time gravimetric summaries of dispensing, generate timely alerts when problems are detected, and capture historical dispensing data for future analysis. All collected data can then be accessed via a web interface for reviewing alerts and dispensing information in real time or remotely for timely intervention of dispense errors. The development of this system also leveraged 3D printing to rapidly prototype sensor brackets, mounting solutions, and component enclosures.
Technical Library | 2022-06-27 16:50:26.0
Electronics industry is one of the fastest evolving, innovative, and most competitive industries. In order to meet the high consumption demands on electronics components, quality standards of the products must be well-maintained. Automatic optical inspection (AOI) is one of the non-destructive techniques used in quality inspection of various products. This technique is considered robust and can replace human inspectors who are subjected to dull and fatigue in performing inspection tasks. A fully automated optical inspection system consists of hardware and software setups. Hardware setup include image sensor and illumination settings and is responsible to acquire the digital image, while the software part implements an inspection algorithm to extract the features of the acquired images and classify them into defected and non-defected based on the user requirements. A sorting mechanism can be used to separate the defective products from the good ones. This article provides a comprehensive review of the various AOI systems used in electronics, micro-electronics, and opto-electronics industries. In this review the defects of the commonly inspected electronic components, such as semiconductor wafers, flat panel displays, printed circuit boards and light emitting diodes, are first explained. Hardware setups used in acquiring images are then discussed in terms of the camera and lighting source selection and configuration. The inspection algorithms used for detecting the defects in the electronic components are discussed in terms of the preprocessing, feature extraction and classification tools used for this purpose. Recent articles that used deep learning algorithms are also reviewed. The article concludes by highlighting the current trends and possible future research directions.
Technical Library | 2021-06-15 18:36:00.0
To compensate for the insufficiency and instability of solder paste dispensing and printing that are used in the SMT (Surface Mount Technology) production process, a noncontact solder paste jetting system driven by a piezoelectric stack based on the principle of the nozzle-needle-system is introduced in this paper, in which a miniscule gap exists between the nozzle and needle during the jetting process. Here, the critical jet ejection velocity is discussed through theoretical analysis. The relations between ejection velocity and needle structure, needle velocity, and nozzle diameter were obtained by FLUENT software. Then, the prototype of the solder paste jetting system was fabricated, and the performance was verified by experiments. The effects of the gap between nozzle and needle, the driving voltage, and the nozzle diameter on the jetting performance and droplet diameter were obtained. Solder paste droplets 0.85 mm in diameter were produced when the gap between the nozzle and needle was adjusted to 10 _m, the driving voltage to 80 V, the nozzle diameter to 0.1 mm, and the variation of the droplet diameter was within _3%.
Technical Library | 2021-07-20 20:02:29.0
During the manufacturing of printed circuit boards (PCBs) for a Flight Project, it was found that a European manufacturer was building its boards to a European standard that had no requirement for copper wrap on the vias. The amount of copper wrap that was measured on coupons from the panel containing the boards of interest was less than the amount specified in IPC-6012 Rev B, Class 3. To help determine the reliability and usability of the boards, three sets of tests and a simulation were run. The test results, along with results of simulation and destructive physical analysis, are presented in this paper. The first experiment involved subjecting coupons from the panels supplied by the European manufacturer to thermal cycling. After 17 000 cycles, the test was stopped with no failures. A second set of accelerated tests involved comparing the thermal fatigue life of test samples made from FR4 and polyimide with varying amounts of copper wrap. Again, the testing did not reveal any failures. The third test involved using interconnect stress test coupons with through-hole vias and blind vias that were subjected to elevated temperatures to accelerate fatigue failures. While there were failures, as expected, the failures were at barrel cracks. In addition to the experiments, this paper also discusses the results of finite-element analysis using simulation software that was used to model plated-through holes under thermal stress using a steady-state analysis, also showing the main failure mode was barrel cracking. The tests show that although copper wrap was sought as a better alternative to butt joints between barrel plating and copper foil layers, manufacturability remains challenging and attempts to meet the requirements often result in features that reduce the reliability of the boards. Experimental and simulation work discussed in this paper indicate that the standard requirements for copper wrap are not contributing to the overall board reliability, although it should be added that a design with a butt joint is going to be a higher risk than a reduced copper wrap design. The study further shows that procurement requirements for wrap plating thickness from Class 3 to Class 2 would pose little risk to reliability (minimum 5 μm/0.197 mil for all via types).Experimental results corroborated by modeling indicate that the stress maxima are internal to the barrels rather than at the wrap location. In fact, the existence of Cu wrap was determined to have no appreciable effect on reliability.
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