Technical Library: hana and microelectronics (Page 1 of 1)

Dam and Fill Encapsulation for Microelectronic Packages

Technical Library | 1999-08-27 09:29:49.0

Contract packaging houses have to contend with a large mix of die types and products. Flexibility and quick turnaround of package types is a must in this industry. Traditional methods of die encapsulation, (i.e., use of transfer-molding techniques), are only cost effective when producing a large number of components. Liquid encapsulants now provide similar levels of reliability1, and are cost effective...

ASYMTEK Products | Nordson Electronics Solutions

Effects of Tin and Copper Nanotexturization on Tin Whisker Formation

Technical Library | 2012-08-16 22:38:05.0

First published in the 2012 IPC APEX EXPO technical conference proceedings. The physical mechanisms behind tin whisker formation in pure tin (Sn) films continue to elude the microelectronics industry. Despite modest advances in whisker mitigation techniqu

Johns Hopkins Applied Physics Laboratory

A Compliant and Creep Resistant SAC-Al(Ni) Alloy

Technical Library | 2009-03-27 22:22:40.0

The Sn-Ag-Cu (SAC) alloys have been considered promising replacements for the lead-containing solders for the microelectronics applications. However, due to the rigidity of the SAC alloys, compared with the Pb-containing alloys, more failures have been found in the drop and high impact applications for the portable electronic devices, such as the personal data assistant (PDA), cellular phone, notebook computer..etc

Indium Corporation

Body of Knowledge (BOK) for Leadless Quad Flat No-Lead/Bottom Termination Components (QFN/BTC) Package Trends and Reliability

Technical Library | 2023-09-18 14:10:01.0

As with many advancements in the electronics industry, consumer electronics is driving the trends for electronic packaging technologies toward reducing size and increasing functionality. Microelectronics meeting the technology needs for higher performance, reduced power consumption and size, and off the- shelf availability. Due to the breadth of work being performed in the area of microelectronics packaging/components, this report limits it presentation to board design, manufacturing, and processing parameters on assembly reliability for leadless (e.g., quad flat no-lead (QFN) or a generic term of bottom termination component (BTC)) packages. This style of package was selected for investigation because of its significant growth, lower cost, and improved functionality, especially for use in an RF application.

NASA Office Of Safety And Mission Assurance

SnAgCuBi and SnAgCuBiSb Solder Joint Properties Investigations

Technical Library | 2008-02-05 22:48:55.0

This study investigates the technological properties of quaternary or quinary alloys made by addition Bi or Bi and Sb elements to the SnAgCu solders. The influence of added elements on the electrical and mechanical properties of solder joints created by these solders between PCB and electronic components were evaluated.

Unipress - Institute of High Pressure Physics of the Polish Academy of Sciences

New development of atomic layer deposition: processes, methods and applications

Technical Library | 2020-09-08 16:43:32.0

Atomic layer deposition (ALD) is an ultra-thin film deposition technique that has found many applications owing to its distinct abilities. They include uniform deposition of conformal films with controllable thickness, even on complex three-dimensional surfaces, and can improve the efficiency of electronic devices. This technology has attracted significant interest both for fundamental understanding how the new functional materials can be synthesized by ALD and for numerous practical applications, particularly in advanced nanopatterning for microelectronics, energy storage systems, desalinations, catalysis and medical fields. This review introduces the progress made in ALD, both for computational and experimental methodologies, and provides an outlook of this emerging technology in comparison with other film deposition methods. It discusses experimental approaches and factors that affect the deposition and presents simulation methods, such as molecular dynamics and computational fluid dynamics, which help determine and predict effective ways to optimize ALD processes, hence enabling the reduction in cost, energy waste and adverse environmental impacts. Specific examples are chosen to illustrate the progress in ALD processes and applications that showed a considerable impact on other technologies.

University of Johannesburg

A Review and Analysis of Automatic Optical Inspection and Quality Monitoring Methods in Electronics Industry

Technical Library | 2022-06-27 16:50:26.0

Electronics industry is one of the fastest evolving, innovative, and most competitive industries. In order to meet the high consumption demands on electronics components, quality standards of the products must be well-maintained. Automatic optical inspection (AOI) is one of the non-destructive techniques used in quality inspection of various products. This technique is considered robust and can replace human inspectors who are subjected to dull and fatigue in performing inspection tasks. A fully automated optical inspection system consists of hardware and software setups. Hardware setup include image sensor and illumination settings and is responsible to acquire the digital image, while the software part implements an inspection algorithm to extract the features of the acquired images and classify them into defected and non-defected based on the user requirements. A sorting mechanism can be used to separate the defective products from the good ones. This article provides a comprehensive review of the various AOI systems used in electronics, micro-electronics, and opto-electronics industries. In this review the defects of the commonly inspected electronic components, such as semiconductor wafers, flat panel displays, printed circuit boards and light emitting diodes, are first explained. Hardware setups used in acquiring images are then discussed in terms of the camera and lighting source selection and configuration. The inspection algorithms used for detecting the defects in the electronic components are discussed in terms of the preprocessing, feature extraction and classification tools used for this purpose. Recent articles that used deep learning algorithms are also reviewed. The article concludes by highlighting the current trends and possible future research directions.

Institute of Electrical and Electronics Engineers (IEEE)

Anisotropic grain growth and crack propagation in eutectic microstructure under cyclic temperature annealing in flip-chip SnPb composite solder joints

Technical Library | 2014-06-19 18:13:23.0

For high-density electronic packaging,the application of flip-chip solder joints has been well received in the microelectronics industry. High-lead(Pb) solders such as Sn5Pb95 are presently granted immunity from the RoHS requirements for their use in high-end flip-chip devices, especially in military applications. In flip-chip technology for consumer electronic products, organic substrates have replaced ceramic substrates due to the demand for less weight and low cost. However, the liquidus temperatures of high-Pb solders are over 300°C which would damage organic substrates during reflow because of the low glass transition temperature. To overcome this difficulty, the composite solder approach was developed...

National Chiao Tung University

Low Force Placement Solution For Delicate and Low IO Flip Chip Assemblies

Technical Library | 2007-06-27 15:43:06.0

Traditionally most flip chips were designed with large bumps on a coarse pitch. However, as the trend towards smaller, more compact assemblies continues the sizes of semiconductor packages are forced to stay in line. New designs are incorporating smaller bump diameters on increasingly aggressive pitches, and in many cases decreasing the total IO count. With fewer and smaller bumps to distribute the load of the placement force it is becoming increasingly vital for equipment manufacturers to meet the challenge in offering low force placement solutions. One such solution will be presented in the following discussion. Also presented will be ways to minimize the initial impact spike that flip chips experience upon placement.

Universal Instruments Corporation

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