Technical Library | 2019-05-21 17:20:36.0
Die attach material selection and process implementation play crucial roles in any microelectronic assembly. The chosen attach methods ultimately affect die stress, functionality, thermal management, and reliability of the assembly. Die attach applications are designed to optimize mechanical attachment of the die to the substrate, to create a thermal path from the die to the substrate, and to create an electrical path for a ground plane connection. Some of the more commonly used die attach materials in the microelectronics industry today are epoxies,polyimides, thermoplastics, silicones, solders, and special low outgassing, low stress, anisotropic adhesives.
Technical Library | 2017-11-22 12:38:51.0
The use of copper foils laminated to polyimide (PI) as flexible printed circuit board precursor is a standard practice in the PCB industry. We have previously described[1] an approach to very thin copper laminates of coating uniform layers of nano copper inks and converting them into conductive foils via photonic sintering with a multibulb conveyor system, which is consistent with roll-to-roll manufacturing. The copper thickness of these foils can be augmented by electroplating. Very thin copper layers enable etching fine lines in the flexible circuit. These films must adhere tenaciously to the polyimide substrate.In this paper, we investigate the factors which improve and inhibit adhesion. It was found that the ink composition, photonic sintering conditions, substrate pretreatment, and the inclusion of layers (metal and organic) intermediate between the copper and the polyimide are important.
Technical Library | 2024-01-08 18:44:00.0
Printed circuit boards, especially multilayer, flexible and rigid-flexible printed circuit boards, are extremely hygroscopic, i.e. they absorb and bind the moisture in the air. A dried polyimide film, for example, will have reached its moisture saturation level again after just a few hours.
Technical Library | 2017-04-13 10:57:53.0
Parylene has been used for decades as a barrier layer to protect critical devices and components. The parylene deposition process typically requires an adhesion promotion step to make sure the parylene adheres well to the base substrate. Typical adhesion methods don't work well on Kapton and Polyamide, until VSI Parylene came up with a solution.
Technical Library | 2021-08-18 01:30:18.0
The interfacing of soft and hard electronics is a key challenge for flexible hybrid electronics. Currently, a multisubstrate approach is employed, where soft and hard devices are fabricated or assembled on separate substrates, and bonded or interfaced using connectors; this hinders the flexibility of the device and is prone to interconnect issues. Here, a single substrate interfacing approach is reported, where soft devices, i.e., sensors, are directly printed on Kapton polyimide substrates that are widely used for fabricating flexible printed circuit boards (FPCBs).
Technical Library | 2023-10-23 18:56:52.0
A thin chip package for off-the-shelf ICs is developed which enables the embedding of these chips into a flexible circuit board. The package consists of a copper fan-out on a polyimide substrate, in which the thinned IC (30um) is embedded. These packages are subsequently integrated in a standard flexible circuit board (FCB). A microcontroller and a proprietary DSP processor are embedded using this technology. The yield of the Ultra-Thin Chip package (UTCP) was measured before embedding in the circuit board, and reaches up to 87% for the packaged microcontrollers (MSP430 family, known-good dies). The yield on the DSP processor was measured to be 62%. After embedding in the FCB, 95% of the functional UTCP-packaged dies are still functional.
Technical Library | 2021-11-03 16:49:59.0
Ultrathin bare die chips were soldered using a novel soldering technology. Using homogeneous flash light generated by high-power xenon flash lamp the dummy components and the bare die NFC chips were successfully soldered to copper tracks on polyimide (PI) and polyethylene terephthalate (PET) flex foils by using industry standard Sn-Ag-Cu lead free alloys. Due to the selectivity of light absorption, a limited temperature increase was observed in the PET substrates while the chip and copper tracks were rapidly heated to a temperatures above the solder melting temperature. This allowed to successfully soldered components onto the delicate polyethylene foil substrates using lead-free alloys with liquidus temperatures above 200 °C. It was shown that by preheating components above the decomposition temperature of solder paste flux with a set of short low intensity pulses the processing window could be significantly extended compared to the process with direct illumination of chips with high intensity flash pulse. Furthermore, it was demonstrated that with localized tuning of pulse intensity components having different heat capacity could be simultaneously soldered using a single flash pulse.
Technical Library | 2020-07-29 19:58:48.0
The majority of flexible circuits are made by patterning copper metal that is laminated to a flexible substrate, which is usually polyimide film of varying thickness. An increasingly popular method to meet the need for lower cost circuitry is the use of aluminum on Polyester (Al-PET) substrates. This material is gaining popularity and has found wide use in RFID tags, low cost LED lighting and other single-layer circuits. However, both aluminum and PET have their own constraints and require special processing to make finished circuits. Aluminum is not easy to solder components to at low temperatures and PET cannot withstand high temperatures. Soldering to these materials requires either an additional surface treatment or the use of conductive epoxy to attach components. Surface treatment of aluminum includes the likes of Electroless Nickel Immersion Gold plating (ENIG), which is extensive wet-chemistry and cost-prohibitive for mass adoption. Conductive adhesives, including Anisotropic Conductive Paste (ACP), are another alternate to soldering components. These result in component substrate interfaces that are inferior to conventional solders in terms of performance and reliability. An advanced surface treatment technology will be presented that addresses all these constraints. Once applied on Aluminum surfaces using conventional printing techniques such as screen, stencil, etc., it is cured thermally in a convection oven at low temperatures. This surface treatment is non-conductive. To attach a component, a solder bump on the component or solder printed on the treated pad is needed before placing the component. The Aluminum circuit will pass through a reflow oven, as is commonly done in PCB manufacturing. This allows for the formation of a true metal to metal bond between the solder and the aluminum on the pads. This process paves the way for large scale, low cost manufacturing of Al-PET circuits. We will also discuss details of the process used to make functional aluminum circuits, study the resultant solder-aluminum bond, shear results and SEM/ EDS analysis.
Technical Library | 2021-07-20 20:02:29.0
During the manufacturing of printed circuit boards (PCBs) for a Flight Project, it was found that a European manufacturer was building its boards to a European standard that had no requirement for copper wrap on the vias. The amount of copper wrap that was measured on coupons from the panel containing the boards of interest was less than the amount specified in IPC-6012 Rev B, Class 3. To help determine the reliability and usability of the boards, three sets of tests and a simulation were run. The test results, along with results of simulation and destructive physical analysis, are presented in this paper. The first experiment involved subjecting coupons from the panels supplied by the European manufacturer to thermal cycling. After 17 000 cycles, the test was stopped with no failures. A second set of accelerated tests involved comparing the thermal fatigue life of test samples made from FR4 and polyimide with varying amounts of copper wrap. Again, the testing did not reveal any failures. The third test involved using interconnect stress test coupons with through-hole vias and blind vias that were subjected to elevated temperatures to accelerate fatigue failures. While there were failures, as expected, the failures were at barrel cracks. In addition to the experiments, this paper also discusses the results of finite-element analysis using simulation software that was used to model plated-through holes under thermal stress using a steady-state analysis, also showing the main failure mode was barrel cracking. The tests show that although copper wrap was sought as a better alternative to butt joints between barrel plating and copper foil layers, manufacturability remains challenging and attempts to meet the requirements often result in features that reduce the reliability of the boards. Experimental and simulation work discussed in this paper indicate that the standard requirements for copper wrap are not contributing to the overall board reliability, although it should be added that a design with a butt joint is going to be a higher risk than a reduced copper wrap design. The study further shows that procurement requirements for wrap plating thickness from Class 3 to Class 2 would pose little risk to reliability (minimum 5 μm/0.197 mil for all via types).Experimental results corroborated by modeling indicate that the stress maxima are internal to the barrels rather than at the wrap location. In fact, the existence of Cu wrap was determined to have no appreciable effect on reliability.
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