Electronics Forum: bond testing (Page 2 of 14)

Re: Shear Testing

Electronics Forum | Wed Jun 02 06:53:44 EDT 1999 | Earl Moon

| I need to perform shear tests on components that have been glued prior to wave soldering. Can any one recommend a shear tester and some standardized info on testing? We have had problems with poor glue bonds and would like to implement a test met

Re: temp stress reliability test for SMT solder bonds

Electronics Forum | Thu Apr 09 13:57:33 EDT 1998 | Mike C

| I am currently involved in a reliability project related to SMT QFP and TSSOP fine pitch solder joint reliability. I have decided to use a temp chamber for stress testing. Is there a test standard that covers this? I am also a bit unsre as to wheth

Re: temp stress reliability test for SMT solder bonds

Electronics Forum | Thu Apr 09 12:33:43 EDT 1998 | Earl Moon

| I am currently involved in a reliability project related to SMT QFP and TSSOP fine pitch solder joint reliability. I have decided to use a temp chamber for stress testing. Is there a test standard that covers this? I am also a bit unsre as to wheth

How long can you leave paste?

Electronics Forum | Mon Mar 19 12:25:11 EDT 2007 | slthomas

This test nicely demonstrates the bond between parts and paste over time, but what about tack of paste on unpopulated boards? It seems she would also need to be testing by placing parts on boards that have been printed for 15 minutes, 30, 1 hour, 2

Conformal Coating Issues

Electronics Forum | Fri Jun 01 10:52:37 EDT 2012 | blnorman

Neither the Omega meter nor the IC are officially "destructive" tests, but everywhere I worked we treated them that way. The boards were scrapped after the test. The Omega meter can be tested at elevated temps, but the IC sample is extracted at ele

glue measurement

Electronics Forum | Fri Oct 05 16:05:58 EDT 2001 | seand

Hello everyone, Your chief variable here is going to be your epoxy. Different materials react accordingly to various inspection methods but, DEPENDING on your print parameters and material, you may be able to utilize an inline inspection machine.

Contaminants after SMT which affect wire bonding

Electronics Forum | Thu Oct 05 16:04:00 EDT 2006 | GS

I am not expert, just my comment, the total ionic contamination allowed after SMT, by using No Clean process, theoretically it should be close to Zero. Any way the Standard IPC-JSTD-001 allows 1,56 ugr NaCl/cm2 for the final Printed Board assembled.

Help-Wire Bonding Defects Analysis After Encapsulation

Electronics Forum | Thu Nov 26 03:59:50 EST 1998 | Chi-Ting Chen

I have some 1.25 mils Al wire bonding chip on board process. After epxoy-based encapsulation, I do some aging test. How can I "see" or prove that there is a "wire break" exist due to the tension of thermal cycling? How can I know the failure is cause

Re: Help-Wire Bonding Defects Analysis After Encapsulation

Electronics Forum | Thu Nov 26 06:07:40 EST 1998 | Earl Moon

| I have some 1.25 mils Al wire bonding chip on board process. After epxoy-based encapsulation, I do some aging test. How can I "see" or prove that there is a "wire break" exist due to the tension of thermal cycling? How can I know the failure is cau

Re: Help-Wire Bonding Defects Analysis After Encapsulation

Electronics Forum | Fri Nov 27 02:09:50 EST 1998 | Chi-Ting Chen

| | I have some 1.25 mils Al wire bonding chip on board process. After epxoy-based encapsulation, I do some aging test. How can I "see" or prove that there is a "wire break" exist due to the tension of thermal cycling? How can I know the failure is c


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