Electronics Forum | Fri Dec 16 18:37:10 EST 2005 | mdemos1
Hi. I am trying to understand Tg and how it relates to reflow. With the higher temperatures of lead free, we have been looking toward laminates with a Tg of 180 instead of the current 140. My question is a little more general. In either lead free
Electronics Forum | Thu Jul 14 11:52:16 EDT 2005 | davef
Sure you can use SPC charting on the wave setup parameters to warn of impending problems. Examples of useful points of analysis are: * Dwell * Temperature * Pot analysis Certainly there's a range of other process controls that could be monitored.
Electronics Forum | Thu Jul 27 21:34:41 EDT 2000 | Dave F
Gary: That's curious. Tell us more about your process steps, temperature profiles, paste, warping of the board without the PIH processing, components, etc
Electronics Forum | Thu Oct 22 11:11:58 EDT 1998 | Hon
Dear all, What are your views on reworking BGA's? I mean, with the BGA going through reflow temperatures four times or more, and with a manual reballing process, wouldn't it raise up a few reliability issues? Would you consider not doing rework on
Electronics Forum | Mon Dec 19 07:29:30 EST 2005 | jax
Tg is just a way to say when the board goes limp... or a quick way to rank laminates... who cares. For lead free you want to look at Td, Decomposition Temperatures. ( Temp at which the material weight changes by 5% )
Electronics Forum | Wed Aug 27 13:08:30 EDT 2008 | vladig
Td - is the degradation temperature for a laminate (board), while Tg - is glass transition one. There is one more (even more important) - delta Tg. They characterize the quality of the laminate material. Regards, Vlad www.sentec.ca
Electronics Forum | Fri Oct 30 10:17:05 EDT 2015 | esoderberg
You don't say how many headers you have to solder. I usually spec in High temp headers and use a pin-in-paste methodology and double reflow. Can you get your headers high temperature?
Electronics Forum | Tue May 02 15:29:14 EDT 2000 | M. F. Roe
I am looking for public papers or articles on intermetallic formation as a function of reflow profile. Most solder paste vendors specify peak temperature and time above liquidus, but I am particularly interested in what happens to intermetallic grow
Electronics Forum | Thu Feb 22 21:01:12 EST 2001 | davef
We don't do this, but if we had to and lacking better advice, for all components I�d dry pack according to J-STD-033, store in a low temperature and humidity controlled environment [maybe using some semicon fab inert storage cabinets], review the eff
Electronics Forum | Fri Feb 17 11:01:47 EST 2006 | amol_kane
with lead-free solders, one would expect to find less instances of tombstoning. this is because SAC alloys are not eutectic and melt over a range of temp (usually 217-220 deg C) instead of at a single temperature. therefore the forces due to solder s