Electronics Forum | Fri Jul 02 10:06:17 EDT 1999 | John Thorup
| | | | We are wave soldering some fabs with a lot of unmasked trace area along the edges. The trace area is solid copper covered with tin / lead, no masking, no components along the edges, same on solder side and component side (goofy board design)
Electronics Forum | Fri Jul 02 05:28:13 EDT 1999 | Vinesh gandhi
| | | We are wave soldering some fabs with a lot of unmasked trace area along the edges. The trace area is solid copper covered with tin / lead, no masking, no components along the edges, same on solder side and component side (goofy board design).
Electronics Forum | Wed Jun 30 17:58:01 EDT 1999 | Boca
| My guess would be trapped flux continuing to be active after soldering. Is the tarnish there immediately after exiting the machine? Do you remove the mask and wash right away? If the solder is reflowing under the mask on the component side it wo
Electronics Forum | Thu Jul 01 14:47:10 EDT 1999 | Tony
| | | My guess would be trapped flux continuing to be active after soldering. Is the tarnish there immediately after exiting the machine? Do you remove the mask and wash right away? If the solder is reflowing under the mask on the component side
Electronics Forum | Mon Mar 13 15:10:52 EST 2000 | Stuart Adams
Assuming agressive design rules what is the minimum distance I can get away with between the board edge and a SMT pad and between the board edge and a plated mounting hole ??? (The board is only 1"x2" and the mounting holes are 80 mil dia, 125 mil
Electronics Forum | Mon Mar 13 15:10:52 EST 2000 | Stuart Adams
Assuming agressive design rules what is the minimum distance I can get away with between the board edge and a SMT pad and between the board edge and a plated mounting hole ??? (The board is only 1"x2" and the mounting holes are 80 mil dia, 125 mil
Electronics Forum | Wed Apr 09 14:50:03 EDT 2008 | bradlanger
We use a FKN pizza cutter and found that even with 5mm clearance and the proper orientation of the part larger ceramic capacitors 1812, 1210 would still stress fracture. We have successfully fixed stress fracture problems by adding routed relief slot
Electronics Forum | Wed Mar 26 16:12:46 EDT 2008 | jlawson
If you have jobs where you can not, there is a company in Japan that makes the best v-groove depanelers called TST, 'guru's in v-groove depanelising'. Their systems can be supplied to reduce stress on cutting to near zero compared to CAB and other lo
Electronics Forum | Tue Mar 25 14:05:16 EDT 2008 | flipit
X7R >Z5U,Y5V. Y5Vs crack more than NPOs. Ceramic resonators crack often as well. I found that the chop style like the Fancord VPD5 is the lease stressful of the V-Score cutters. We have run as close as 0.025" to the edges with 0805s with no crack
Electronics Forum | Sun Oct 09 11:16:06 EDT 2016 | mekmat
Hello, I would like to ask you about the minimal distance between components and border of pcb especially V-cut to avoid crack of component during depaneling? I need some standard (IPC or something) where is this defined? Thank you for your support
