Electronics Forum | Fri Aug 30 17:39:34 EDT 2002 | slthomas
Can't seem to get a reply through (watch, they'll all show up in about 15 minutes), so I'll try this. Thanks guys. Hi Larry, long time no talk to. "Dispenser Boy"???!! If they wanted me to build them (instead of the overseas CM) I'd print them my
Electronics Forum | Fri Aug 30 17:33:20 EDT 2002 | slthomas
Thanks, guys. Hi Larry, long time no "see". Dave, 60k dots out of a Camalot 2800 does not a "Dispenser Boy" make. :P I'd print them in a heartbeat if the proximity to radial leads didn't necessitate me placing radials first. Oh, wait, I'd have to
Electronics Forum | Thu Aug 29 20:04:13 EDT 2002 | davef
Steve: I agree. Let�s break it down. * I�d rather print paste than glue any day of the week * But I know yera �Dispenser Boy�. In that case, I�d rather dispense glue than paste. * PTH / primary and SMT / secondary is a tough process either way you
Electronics Forum | Thu Jun 04 12:26:30 EDT 1998 | Dave F
| If you could measure and chart 3 variables in my process, what would they be? | The boards that I produce are on panels that are 12up and 2x4 up. All boards are single sided paper base w/o plated thru holes. They are on scored panels that measure
Electronics Forum | Fri Nov 24 09:15:30 EST 2006 | davef
Julie: What is the benefit of your SQE requiring that your CE meet your first pass yield targets?
Electronics Forum | Thu Nov 23 09:41:36 EST 2006 | Jon
The DPMO is a far better measure - first pass yield doesn't give you any indication on quality or effectiveness of test step. If you want 100% first pass yield, test nothing - works every time - you see where I am coming from..........
Electronics Forum | Thu Nov 09 17:54:54 EST 2006 | russ
I would trust that you are benchmarking some design rules as well? Yield is directly related to design as well as process capability. anyway 95% is not a bad first pass yield at all, and I would tend to think that that is a little high when dealing
Electronics Forum | Tue Jul 03 09:13:18 EDT 2001 | rstodd
I work for a memory module manufacturer and I am interested in obtaining information on typical first-pass yield numbers and failure rates in the memory module industry for benchmarking purposes. Any information provided would be greatly appreciated
Electronics Forum | Sun Dec 07 13:16:23 EST 2003 | Kevin Gilbraith
With totally stable screen print (solder paste), placement and reflow processes, what is a world class target first time yield for good pcbs? How bad is 65% FTY. Your views would be welcome.
Electronics Forum | Thu Nov 09 16:38:26 EST 2006 | Julie
Our SQE's want to benchmark the first pass yield requirements that we place on our CM's - currently they are at 95% - does this seem reasonable?
