Electronics Forum: seal and copper and layers (Page 2 of 3)

Time and temp in lead and lead-free reflow

Electronics Forum | Mon Jul 28 14:30:22 EDT 2008 | grics

Take a look at this. Remember, these are only guidlines and can not replace any paste specs. As Real Chunks said, a profiler will be of HUGE help. We use this to determine what our top side temps are and to see if we have any problems with heat sen

Wave Cassettes and Heat convection

Electronics Forum | Tue Jan 16 07:07:17 EST 2007 | tk380514

Answers: The component does take solder, no problem We get a full barrel fill with an empty PCB but only on one of the holes, the other hole has so much copper around it. The flux reached the top of the PCB when I tested the empty PCB. The IPC-A-610

Re: Silver Epoxy and CEM3

Electronics Forum | Fri Aug 28 23:32:39 EDT 1998 | Pete Sorenson

| Does anyone have any experience they are willing to share on Ag epoxy used as a copper through hole plating replacement? Was CEM3 used? | What are the limitations? | Thanks, | Steve I have used silver epoxy extensively for conductive bonding applic

Wave Cassettes and Heat convection

Electronics Forum | Mon Jan 15 09:19:29 EST 2007 | tk380514

We use Alpha EF-2202 low-VOC No-Clean flux Selective wave soldering cassettes Bottom pre-heating wave soldering machine We have one component that will not solder properly: http://www.epcos.com/web/generator/Web/Sections/ProductCatalog/Capacitors/Ul

Shear strength and Copper/Tin Intermetalic layer

Electronics Forum | Mon Jul 06 20:32:34 EDT 1998 | Chiakl

Hi there, I am looking for some informations concerning the shear or pull strength of a typical TQFP 20 mils leads in relationship with the Copper/Tin intermetalic layer thickness. Could anyone help? Thank in advandce. rgs, chiakl

Re: Shear strength and Copper/Tin Intermetalic layer

Electronics Forum | Thu Jul 09 21:04:50 EDT 1998 | Dave F

| Hi there, | I am looking for some informations concerning the shear or pull strength of a typical TQFP 20 mils leads in relationship with the Copper/Tin intermetalic layer thickness. Could anyone help? | | Thank in advandce. | rgs, | chiakl Chiakl

Reflow soldering problems and traces under component

Electronics Forum | Mon Jul 18 12:24:53 EDT 2016 | oleksz

Some people involved in PCB assembly process claim that SMD components reflow soldering problems are often caused by traces running under a component. According to this claim, trace (or any copper) covered by solder mask and placed under SMD componen

Reflow soldering problems and traces under component

Electronics Forum | Mon Jul 18 12:25:30 EDT 2016 | oleksz

Some people involved in PCB assembly process claim that SMD components reflow soldering problems are often caused by traces running under a component. According to this claim, trace (or any copper) covered by solder mask and placed under SMD componen

Processing questions - PCB and BGA's

Electronics Forum | Fri Jan 30 10:29:48 EST 2009 | petep

We have a potential new customer who has special PCB requirements. I do not know a lot of details at this point, but have several questions. One of their assemblies has within it , a MID, Solid foil layer, completely isolating one side of the PCB f

Aperture Adjustments and Etch Compensation on Arrays

Electronics Forum | Thu Mar 28 15:53:49 EDT 2019 | SMTA-Jon

As a CM, we don’t have a lot of input on the PCB layouts we receive. Some engineers/software packages output the paste layer 1 to 1, some do an across the board reduction, and some set each part up individually with different reductions per footprin


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