Electronics Forum: link fail (Page 2 of 3)

Re: castellations vs. no castellations

Electronics Forum | Mon Jul 26 19:32:03 EDT 1999 | Steve Gregory

| Can anyone give me the virtues of SMT package castellations vs. no castellations with particular reference to the ruggedness and reliability of the solder joints? Any references or studies that you can point me to? Also, although I'm in favor of

Re: Pin in hole process problem

Electronics Forum | Tue Jul 28 16:13:45 EDT 1998 | Steve Gregory

| Hello everybody. | Remember I posted some questions on the smtnet regarding placing the thru hole connector using paste and reflow(pin in hole). I have able to accomplish the process succcesfully.....but I have a problem. The boards are failing at

Re: Handsoldering ceramic capacitor's

Electronics Forum | Thu Jun 25 11:53:09 EDT 1998 | Dave F

| | Dennis, thanks for your input. I myself can't remember having any caps fail due to thermal stress/cracking. But the guru's here says it happens and since the assembly is for space flight, it's a requirement to preheat. Also, your process is exac

Solder Paste Inspection Systems

Electronics Forum | Wed Jan 30 12:53:58 EST 2008 | tonyamenson

In approximately one month I am installing 2D at our DEK print station. We are going with the basic (cheap) software options and 2D camera. After it is up and running we will determine if it is indeed useful. At that point we will decide on the adva

How to calculate the ROI

Electronics Forum | Tue Jun 26 19:59:08 EDT 2001 | davef

They always tell you to calculate ROI, when they want to blow you off. Do a net search using - calculate ROI. Links to three pretty good descriptions on this are: http://www.dmreview.com/editorial/dmreview/print_action.cfm?EdID=2487 http://www.eval

Re: Residue/Cure Testing Of Solder Mask

Electronics Forum | Fri May 29 17:48:34 EDT 1998 | Earl Moon

| | | We recently made the switch to no-clean and the wurface mount is turning out beautifully. However, the wave solder process continues to put up a fight; we are getting a white residue on the surface of the PCB. The residue is not localize

Re: Residue/Cure Testing Of Solder Mask

Electronics Forum | Sat May 30 08:24:09 EDT 1998 | Dave F

| | | | We recently made the switch to no-clean and the wurface mount is turning out beautifully. However, the wave solder process continues to put up a fight; we are getting a white residue on the surface of the PCB. The residue is not locali

Re: Residue/Cure Testing Of Solder Mask

Electronics Forum | Sat May 30 12:51:29 EDT 1998 | Earl Moon

| | | | | We recently made the switch to no-clean and the wurface mount is turning out beautifully. However, the wave solder process continues to put up a fight; we are getting a white residue on the surface of the PCB. The residue is not loca

Solid Solder Deposit

Electronics Forum | Tue Aug 10 09:09:39 EDT 2004 | mattkehoe

wash->ssd top->wash->sticky flux bottom side->place smt components->reflow->wash->sticky flux top side->place topside smt components->reflow->wash) ssd is basically the process of applying solder paste to the pcb with a stencil and the solder reflowe

Stencil cleaners.

Electronics Forum | Mon Jul 17 13:37:35 EDT 2006 | carln

Here is something I copied from Circuitnet.com. This appears to answer your question and then some... http://www.circuitnet.com/experts/ Ask the Experts Jul 17, 2006 What type of cleaner method is preferred for lead-free stencils? What type of s

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