Electronics Forum | Wed Sep 30 12:11:56 EDT 1998 | Claudine Hanson
We are trying to eliminate/minimize the baking process for high lead-count ICs. We would like to reseal packages containing these parts to minimize exposure to humidity. Anyone have or know of a way to reseal or vacuum pack parts? Any suggested eq
Electronics Forum | Mon Sep 17 10:09:45 EDT 2001 | martys
What variables that you have tested are sensitive to producing tombstoning defects and what advice can you provide to minimize them?
Electronics Forum | Fri Feb 28 03:59:41 EST 2020 | SMTA-Davandran
My input are: i. To solve tape not pulling back if it is due to high per is better to use more feeders to minimize this issue. ii. To slow down printing speed. Hence, has proper line balancing which minimize board idling before pick and place process
Electronics Forum | Fri Feb 05 20:39:41 EST 2010 | localperm79
I've recently been placed in control of operations of our SCS conformal coat sprayer and I must eliminate problems with wicking of humiseal 1b73 into surface mount connectors while also trying to minimize masking as much as possible. We use a 55:45
Electronics Forum | Fri Nov 01 14:27:27 EST 2002 | kenBliss
Based on this thread Shouldn�t the handling systems allow the worker to do what is needed on the board during the stated hand operation so the worker has minimal direct contact with it. Now for the non sales pitch, sales pitch. Doesn�t it make the
Electronics Forum | Fri Oct 01 17:27:34 EDT 2004 | Optel
The only software designed to minimize number of setups and setup changeover time: http://www.optelco.com
Electronics Forum | Tue Feb 28 12:33:19 EST 2006 | Quality Engineer
Looking for broad industry data for goals for FPY. What is a good bogey? What is minimally acceptable?
Electronics Forum | Thu Mar 02 17:46:22 EST 2006 | Chris
Go with no greater than 0.005". Pleanty of paste and minimal shorting issues. 0.004" will even work
Electronics Forum | Fri Jun 12 14:28:17 EDT 2009 | isd_jwendell
Minimize scavanging by the attached trace and provide more uniform temperatures between all pads.
Electronics Forum | Thu Sep 21 17:50:43 EDT 2000 | Bill Boles
Does anyone have a quick reminder for a PCB with immersion gold surface finnish going through a reflow profile: Which of the following statements is more correct? A: In order to minimize gold in the intermetallics of the solder joint, the board temp
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