Electronics Forum | Wed May 20 17:00:56 EDT 2009 | dyoungquist
We just placed a 56 pin QFN, 1 per board, on 10 boards and had zero defects. A good paste job, proper placement and a correct oven profile are the keys. If these are set up correctly, on larger runs your defects won't be zero but they should be le
Electronics Forum | Wed May 20 17:18:09 EDT 2009 | daxman
Just out of curiosity, how are you or anyone else determining a defect? Last I checked, IPC had no criteria yet for solder defects for QFN components. Has this changed? Biggest problems we see are voids which our x-ray shows a lot of. Our problems
Electronics Forum | Tue May 12 10:03:12 EDT 2009 | daan_terstegge
Hi All, I see more and more components like QFN or LGA with bottom-only terminations,with landpatterns getting finer all the time. I have no ppm-figures of our process, but based on a benchmark study by Agilent I'd say that 500 ppm is a decent value
Electronics Forum | Wed May 20 17:56:51 EDT 2009 | dyoungquist
I have attached a pdf showing the dimensions for the QFN we placed. First, The pins on the part are not only on the bottom side but also wrap around to come up each of the 4 sides of the part as shown in the side view in the attached pdf. This i
Electronics Forum | Wed Jun 03 16:10:54 EDT 2009 | mattkehoe
Here is a little different spin on re-working/hand placing LGA's.. http://www.sipad.com/download/LGA%20Rework%20Document.pdf
Electronics Forum | Tue Nov 28 16:28:14 EST 2000 | CAL
Chris- The machines you identified are stable products and have been around for over two years now and most bugs have been worked out. The F5 IC head has not changed much since its introduction over 5 years ago. Remember these machine like to run, r
Electronics Forum | Tue Mar 19 17:30:46 EST 2002 | rculpepp
Does anyone have or know of any published guidelines for BGA layout on PWB's so that they can be tested. Specifically using micro vias? If anyone has any input regarding other test considerations for BGA devices I'd like to hear from you as well. W
Electronics Forum | Tue May 26 14:39:40 EDT 2009 | boloxis
QFN or MLFs are mainstream now, QFNs already evloved to much more complex versions now like matrix pins, stacked dice and flipchip versions. IPC 610D already includes them, just make sure the pins have solder plating, the PWB pads have soldermask in
Electronics Forum | Wed Mar 04 14:35:16 EST 2009 | clampron
Good Afternoon Everyone, I have a customer who is inquiring as to the use of a no clean solder paste on their RoHS assembly. We are currently building this with OA, cleaning and then underfilling the QFN, BGA comonents after a sucessful ICT. Does any
Electronics Forum | Tue May 26 15:39:16 EDT 2009 | mikesewell
Amkor's MLF guidelines are very similar to Actels. 1 to 1 on the stencil to part pad on the I/O pads, 75% with a grid windowpane, 0.125 mm/5 mil stencil. For example, the Actel area ratio for a 0.3 mm sq. pad and 0.125 mm stencil is 0.6 which seems