Electronics Forum | Mon Jul 23 00:59:18 EDT 2001 | mugen
Dave. F. Hmmmzzz.... Thats interesting, coz as a contract manufacturer, we try to optimize processes asmuchaspossible.... simple...yeah! that's the word "Simplify".... We found that if you layout a production line, assume x10 operators, and one si
Electronics Forum | Mon Jul 23 01:00:40 EDT 2001 | mugen
Dave. F. Hmmmzzz.... Thats interesting, coz as a contract manufacturer, we try to optimize processes asmuchaspossible.... simple...yeah! that's the word "Simplify".... We found that if you layout a production line, assume x10 operators, and one si
Electronics Forum | Mon Jul 30 21:03:44 EDT 2001 | davef
You should specify the level of res based on the effect of the res on the end-use of the product. J-STD-001 defines cleanliness requirements for ALL flux types, including water soluble and no-clean that you mention. 1 There is no equivalency betwee
Electronics Forum | Mon Dec 13 19:34:09 EST 1999 | Steve Thomas
Thanks, gentlemen. All points well taken, and some hit pretty close to home. Our pick-and-place programmer assures me that coplanarity isn't the issue because the machine won't (or can't) place parts beyond an acceptable criteria. It's an Amistar
Electronics Forum | Sun Oct 10 17:40:50 EDT 1999 | JohnW
| | | Is there an IPC Standard stating the max. number of times that a PCB can pass through a reflow or wavesolder machine without having solder mask breakdown. | | | | | | PCB is FR4 | | | Solder Mask is LPI | | | Reflow and W/S Profile = Standard
Electronics Forum | Wed Oct 06 12:03:12 EDT 1999 | Graham Naisbitt
| | Hi, | | | | Help! Could anyone help to enlighten me on this? | | | | Question: | | | | If I have a CSP/BGA package of size X by Y and the standoff gap between the component and PCB is Z, What is the maximum allowable Y/Z or X/Z that using a n
Electronics Forum | Wed Oct 06 23:36:28 EDT 1999 | karlin
| | | Hi, | | | | | | Help! Could anyone help to enlighten me on this? | | | | | | Question: | | | | | | If I have a CSP/BGA package of size X by Y and the standoff gap between the component and PCB is Z, What is the maximum allowable Y/Z or X/Z
Electronics Forum | Fri Oct 08 02:31:07 EDT 1999 | Brian
| | | | Hi, | | | | | | | | Help! Could anyone help to enlighten me on this? | | | | | | | | Question: | | | | | | | | If I have a CSP/BGA package of size X by Y and the standoff gap between the component and PCB is Z, What is the maximum allowab
Electronics Forum | Tue Sep 28 11:23:36 EDT 1999 | Scott Cook
| GUYS THANKS FOR THE INFO YOU SENT ME . NOW FOR MY | NEXT QUESTION. HOW DO I MARKET MY COMPANY? WHERE | DO I BEGIN TO LOOK FOR NEW CUSTOMERS WILLING TO TAKE | A CHANCE ON A NEW COMPANY WITH NO PROVEN TRACK RECORD? | WHAT ARE SOME OF THE QUESTIONS I
Electronics Forum | Thu Aug 19 19:04:55 EDT 1999 | Brian Wycoff
| | Can anyone help on the subject of de-wetting during the spray coating process. We use PC29M Parts A+B spray coating material, Humiseal tapes and masking dots, Marigold supertouch V70N gloves and Concoat CM533 liquid masking material. We also use