Electronics Forum | Tue Jan 25 13:15:17 EST 2000 | Michael Allen
Thanks for the input Mike (and others). As you guessed, via-in-pad is not my idea, and I'm resisting it as much as I can. One of our designers used this practice at some other company, says there were no problems, and wants to use it (via-in-pad) a
Electronics Forum | Fri Jan 14 07:55:07 EST 2000 | Pat Pepper
Hi Wolfgang, Thanks for the response. We had a similar situation to yours with some white tin samples that sat around for about eight months. Samples soldered right after they arrived soldered better than the ones we soldered eight months down the
Electronics Forum | Tue Dec 14 17:02:04 EST 1999 | John Thorup
Hello Kris If you do have and OSP coating I'd say Curtis has nailed it. But you seem to have references to gold. Does this board have a standard nickle/gold finish. If so what sort of "solder on gold" problems were you having? Reading between the
Electronics Forum | Thu Dec 16 06:59:43 EST 1999 | Christopher Lampron
Calvin, We have found several reasons for solder beading occurance. We have found that solder balling is usually directly attributed to the reflow profile while solder beading is usually (but not always) a result of either excessive solder paste volu
Electronics Forum | Tue Dec 14 01:05:09 EST 1999 | cklau
Hi All I have a 0.7 mm diameter hole for vias, what�s the minimum annular ring for this hole diameter? Ans: Fur inner layers Min = .006" hole-pad annular ring ; inner pad dia - hole dia/2 For outer layers Min = .005" hole-pad annular ring ; outer p
Electronics Forum | Mon Dec 06 03:54:57 EST 1999 | Chris May
Hi Russ, I have a similar situation. I have been told that this can be caused by the nickel, over which the gold is plated, can result in suspect joints, embrittlement etc. Some joints can even be weak and broken without much force on some of my boa
Electronics Forum | Thu Nov 25 21:43:49 EST 1999 | cklau
Via is normally a plated thru holes in (0.63 to 1.0 mm (0.025" to 0.040") diameter lands , which unless properly treated they must be located away from the component lands to prevent the solder migration off the component land during reflow soldering
Electronics Forum | Mon Nov 15 21:35:50 EST 1999 | Dave F
Bob Bob: Fortunately, you found this before you built-up a lot of product. Some thoughs and other drivel: 1 Use IPC-TM-650, Method 2.4.8 for copper peel with a Instron machine. Typical pad peel strength requirement for FR-4, 2 oz. copper is: 6 l
Electronics Forum | Fri Nov 12 10:00:42 EST 1999 | Dave F
Edmund, following-on from Wolfy: Back in the old days, anyone who could spell "sodder" considered "bright and shiny connections" GOOD and "dull and grainy connections" BAD. Now, "dull and grainy" connections can be either GOOD or BAD, depending on
Electronics Forum | Wed Oct 27 17:27:58 EDT 1999 | John Thorup
well... it might be cheaper. But I think it's a bad idea. First, your operators will hate you by the end of the day with their sore feet, not to mention lost productivity. Second, safety. Even if the plates are connected to ground through a resistor
