Electronics Forum | Sun Jun 06 11:01:36 EDT 2004 | adm
Hi I'm trying to plot a LSP profile to reduce void. But I do not have much info about LSP. Does anyone know what are the specific times and temperature of the LSP profile? And are there any ways to eliminate solder void other than changing profile
Electronics Forum | Sun Jun 06 11:02:33 EDT 2004 | adm
Hi I'm trying to plot a LSP profile to reduce void. But I do not have much info about LSP. Does anyone know what are the specific times and temperature of the LSP profile? And are there any ways to eliminate solder void other than changing profile
Electronics Forum | Tue May 08 22:34:53 EDT 2007 | davef
Do you mean "how to solve or reduce this defect at wave soldering process" while continuing to use-up my SACX solder? If so, try: * Smaller solder volumes lower shrinkage hole / hot tears [Higher hole diameter versus pin diameter helps in reducing v
Electronics Forum | Mon May 24 19:38:33 EDT 2010 | smt_guy
Has anyone here specially the Gurus heard, used or seen a Reflow Oven with Vacuum? Is the result really good when it comes to reducing Voids? Can you share any info about this oven? thanks and regards...
Electronics Forum | Mon Jun 14 12:22:24 EDT 2010 | chrisatae
What can I do to reduce BGA solder voids?
Electronics Forum | Wed Jul 16 21:38:27 EDT 2003 | sam
I have done a DOE on the SMT components, not the BGA, for reducing void within the solder. The result did not help in the void reduction, but confirmed that the speed of the IR oven, solder paste thickness may be the important factors for the void.
Electronics Forum | Tue May 16 11:53:39 EDT 2006 | Ajay
Hi, I am having trouble with outgasing voids on my solder bumps.Substrate is Cu with electrolytic Au on it.Sometimes I use electrolytic Ni beneath Au.I am doing laser soldering so this process is fluxless.Its been observed that Ni is helping in redu
Electronics Forum | Mon Jan 17 18:36:26 EST 2000 | William
Voids can be acceptable @ 24% per 5 balls area, and 8% per single ball area. In fact, Proceeding Book 1996; Vol. I, Page #126 conclusions saids: that solder joint voiding at the maximun levels pbserved in this study (were voided area was up to 24 per
Electronics Forum | Wed Mar 15 08:47:50 EDT 2017 | emeto
From what I know, you should follow IPC standard for the class assembly that you are building. From your post somebody mentioned something somewhere - doesn't make it official information. I would not be worried about having voids, but what is their
Electronics Forum | Thu Jan 17 17:54:22 EST 2008 | dman97
Stay far away from the WS619 paste. It is a nightmare to get a decent solder joint out of it. And dont get me started on voiding issues with this paste. We eventually started to use Indium 3.2 lead free "water wash" paste and this drastically reduced
