Electronics Forum: screen printing via test point (Page 3 of 6)

Re: Capability Study for Solder Printing Process

Electronics Forum | Tue Jan 23 22:38:43 EST 2001 | rpereira

I have recently completed a HUGE screen-printing DOE. I used Taguchi methodology and man I got good results! Here is what I learned for what it's worth: (p.s. to the MPM apps guy I sent a copy to Tim Gillis, Lou Fuda, etc...) EFab vs. Laser: EFab

Re: Wave Solder Problems - VIA HOLES

Electronics Forum | Fri Jun 04 15:51:36 EDT 1999 | JohnW

| | | I'm encountering a new problem at my new company that I haven't encountered before in my past life - and that's Wave Soldering VIA holes. | | | | | | We've been getting a rash of defects that we call in this company, "insufficient solder in VI

Re: BGA's - Re-ball -- How thick?

Electronics Forum | Tue May 18 16:48:49 EDT 1999 | Tony

| | | | | What is the best way to re-ball a BGA? Who has the best system for doing it? | | | | | | | | | I'm using our SRT rework stuff to reball in house - when necessary. Of course, we only do this for protos and test boards. We use a standard mi

Lead Free ...

Electronics Forum | Tue Aug 31 13:23:37 EDT 2004 | frankracine

Thanks Ken for your reply. Concerning OSP, there are a few negative points that I must considered for our application. I've read all the following points in an Entek document. Never test it. - If you have a miss print and you clean the PCB, the co

Re: Thanks.

Electronics Forum | Mon Jun 07 11:10:56 EDT 1999 | Brian Wycoff

| | | | | | | Geez, those test guys are always whining about via holes, aren't they? I even had one test guy go over to our finals/add-on department and instruct everone to look for unfilled vias and fill them by hand! Without consulting the area

baking boards, revisited

Electronics Forum | Fri Oct 04 11:34:42 EDT 2002 | Bob Willis

Some additional comments from a paper may be of interest. Baking Printed Circuit Boards - Why and How Baking printed boards prior to conventional and surface mount assembly should not be necessary. Often boards are baked for historical reasons; in

Printing SPC

Electronics Forum | Fri Sep 06 11:58:21 EDT 2002 | Brian W.

The most effective method is to monitor both printing results and parameters. Periodically (maybe once per month), run QCCalc or another program to measure the machine's capability to hold its set parameters. I also run control charts on the paste h

Solder Paste Inspection Criteria

Electronics Forum | Mon May 06 12:44:50 EDT 2002 | Bob Willis

The SMART Group is starting a new project on PPM Monitoring which will be providing average PPM yield data per month free to the industry. I would like to get feedback or exchange criteria for paste printing as non exists with in IPC or similar organ

Re: BGA's - Re-ball -- How thick?

Electronics Forum | Tue May 18 16:24:25 EDT 1999 | Scott McKee

| | | | What is the best way to re-ball a BGA? Who has the best system for doing it? | | | | | | | I'm using our SRT rework stuff to reball in house - when necessary. Of course, we only do this for protos and test boards. We use a standard micro-st

Re: DPM-Rate for SMT pprocess

Electronics Forum | Tue Oct 06 15:41:14 EDT 1998 | Mike C

| | Does sombbody know what DPM rate a good and reliable SMT assembly line (incl. solder paste print, assembly and feflow soldering) has? | | DPM is Defects per million, usually measured on components. We run a process consisting of small to medium b


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