Electronics Forum | Mon Nov 07 11:26:23 EST 2005 | CW
How large of chip capacitor can we use reliably? I��ve heard they tend to crack. I��ve also heard if you pre heat the larger chip caps (1812 and above) before vapor phase reflow, they won��t crack. If I use 2 mil copper for a power supply board, a
Electronics Forum | Tue Nov 08 05:00:23 EST 2005 | rlackey
Hi CW, Regarding orientation, yes, your diagram is right - see the following link for confirmation. http://search.murata.co.jp/Ceramy/image/img/A18X/C2EB3C.PDF Regarding information on bending strength you want to talk to your local Murata office
Electronics Forum | Mon Nov 07 12:25:32 EST 2005 | Rob
Hi CW, Larger chip caps can be susceptable to cracking, but mainly this is due to handling - flexing of boards is the main culprit (the part being mechanically joined at both ends to the board). PCB's usually flex easiest along one axis, and larger
Electronics Forum | Mon Nov 07 16:31:47 EST 2005 | CW
hi Bob, Thanks for the info. I understand your comments, but I am looking for specific guidance, If I am putting chip capacitors on a .063 FR4 board, what size package should we stay away from to avoid cracking? (I realize this is dependent on h
Electronics Forum | Tue Mar 07 08:48:55 EST 2006 | samir
Our ICT Guy here at my company loves to use lots of via holes as test points - via holes which are 0.040" diameter, and spaced at 0.004" edge to edge spacing! He doesn't like to tent the via's either, so I always battle via-to-via shorts at the wave
Electronics Forum | Mon Jun 03 13:26:32 EDT 2019 | az2019
Hi, I have a general question about the relationship of PCB thickness and BLR testing result. For example, I have QFN6x6 parts mounted on board in 1.2mm, 1.6mm, and 2.4mm thickness. All boards have 6 layers of Cu. Studies show thicker board gives les
Electronics Forum | Wed Jul 24 09:54:49 EDT 2019 | amitthepcbguy
Typically, the reliability of PCBs suffers significantly due to the increase in aspect ratio. It is not preferred to opt for high thickness boards. However, I would like to point out that your assumption seems to be wrong as board layers do not direc
Electronics Forum | Mon Sep 17 16:03:13 EDT 2001 | jschake
The results from an experiment comparing 27 different combinations of pad dimensions concluded that the pad design with 15 mil pad length, 12 mil pad width, and 9 mil pad separation produced the best assembly yields. A 5 mil thick laser cut stencil
Electronics Forum | Tue Jun 25 01:24:25 EDT 2019 | sssamw
That is possibley CTE mismatch between QFN and PCB material, the thicker PCB the higher fail rate.
Electronics Forum | Tue Nov 11 17:35:08 EST 2008 | davef
SM-840, is a material qualification document only, with all the test requirements applicable only to a defined test coupon, not to production boards. So, it's useless for what you're trying to accomplish. As assemblers use A-610 - Acceptability Of E
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