Electronics Forum | Sat Jun 09 09:32:26 EDT 2001 | davef
Yes, your pallet will absorb / steal heat. It sounds like you are doing a good job in understanding the issues. Yes, the pallet could be the problem. Is this a new run that you are starting? Or has everything been OK, but recently you've begun to
Electronics Forum | Fri Feb 27 11:33:32 EST 2004 | Bryan
Very strange question,but interesting.Is there anyone who have conducted any experiments to figure out the results?I made a profile board,one thermal couple on pad and other one drilled into the ball of BGA.the 2 points are perpendicular to conveyor
Electronics Forum | Mon Jun 02 16:33:35 EDT 2008 | operator
Is there some good resources (.pdfs, websites, articles) that someone can point me to regarding design for bga footprints? I need to brush up on thermal relief design for bga footprints. I got a customer whose bga lands are masking defined on top of
Electronics Forum | Mon Dec 07 14:55:41 EST 2015 | clydestrum
So I have an issue coming up that I'm not too sure how to handle. A board was designed with the wrong footprint for a 3-lead transistor in which the single-lead side has a much larger (think thermal pad for qfn) copper land than what is meant for the
Electronics Forum | Thu Aug 13 14:10:01 EDT 2015 | markhoch
Hi Sam, I have a feeling that what you're trying to communicate is that your DPAK's are skewing off the pad during reflow. This is caused by a thermal "mismatch" where the solder paste on one side of the DPAK becomes molten before the other, then th
Electronics Forum | Wed Apr 13 21:17:18 EDT 2022 | stephendo
If it was ROHS, I would say that the pads are definitely dissolved away. And it sounds like that is the case here. Your best bet is if it is class 2 and the barrels are at least 50% then push for them to be accepted. If you are trying for more barr
Electronics Forum | Fri Aug 02 12:07:50 EDT 2002 | johnw
Richard, your asking a multi million dollar question that in my own opinion no one can give you the right answer since no one really knows. hence I think the lack of answers to your question....thought there would be more people willing to propose a
Electronics Forum | Fri Oct 16 14:11:16 EDT 2009 | davef
thermal and pad
Electronics Forum | Wed Oct 21 08:06:06 EDT 2009 | scottp
I agree with Dave. If the device has a lot of power we'll put thermal vias between the solder deposits with annular rings of soldermask to keep solder out of the holes. We've never had to mess with placement pressure. We've been using QFNs for yea
Electronics Forum | Thu May 06 19:21:24 EDT 2021 | markhoch
Verify your aperture reductions in the stencil. Are the solderballs always in the same location? Same size & shape? Is the solder leaching through plated thermal holes from the opposite side of the PCB? Are you using stencil apertures designed to min
