Electronics Forum | Wed Nov 17 15:01:44 EST 1999 | Doug Philbrick
I am a Siemens person myself but you won't get 23", you can get 20 though and I believe you could feed in a 23" board length wise. If your parts fit in a 20" area 80F4 is the way I would go. My second choice would be MYdata. They are the large board
Electronics Forum | Thu Nov 11 17:17:11 EST 1999 | Boca
1. Most ionic testing is measured in NaCl, that is, the ionic residues are quantified in terms of NaCl equivalence. The test does not determine what the ionic residue is, just its relative strengh. 2. I use IPC cleanliness specs on OA fluxes but n
Electronics Forum | Mon Nov 01 22:16:04 EST 1999 | Dean
Without a detailed description of the suspect parts It is difficult to pin-point the exact solution to your process problem. However, whenever possible avoid non-value added additions to your current process. Here is the reality of the situation:
Electronics Forum | Tue Sep 14 09:13:34 EDT 1999 | Chris McDonald
| | | Has anybody have any experience with Top placement of BGA's. GLue descretes on bottom and then wavesolder.? | | | | | | | | | | | Hi Chris, | | Why don't you process a double side reflow and use selective wave fixture for wave process. T
Electronics Forum | Sat Aug 21 12:38:09 EDT 1999 | Earl Moon
| Want to know the Tools/ Process required to get started with CSP prototyping and R & D. | Anyone working on this , please help out. | Depending on the type, size, and pitch - just like BGA's, they aren't tough. Our 1mm types went through prototypi
Electronics Forum | Thu Jun 03 16:12:24 EDT 1999 | Earl Moon
.020" pitch spacing. Which have yielded my process excelent results. | My main stencil supplier is I-Source in Irvine, CA and has pretty much standardized on 100% lazer cut stencils for competetive pricing. | Hope this helps. | | Deon Nungaray | SM
Electronics Forum | Thu Jun 03 18:00:33 EDT 1999 | John Thorup
.020" pitch spacing. Which have yielded my process excelent results. | | My main stencil supplier is I-Source in Irvine, CA and has pretty much standardized on 100% lazer cut stencils for competetive pricing. | | Hope this helps. | | | | Deon Nunga
Electronics Forum | Mon Mar 01 09:14:00 EST 1999 | Jules Winfield
| I'm trying to get a feel for what the industry is doing with regards to collecting assembly defect data in the SMT/PWA process. Is it sampling or 100%? What are the points within the process where critical assembly defect data is collected. We run
Electronics Forum | Tue Jan 12 19:49:28 EST 1999 | Ross Berntson
| Hi Folks. Has any Process Engineer here done a complete evaluation or controlled experiment for VOC-FREE Flux? Our goal here at CEBUKid, Inc. is to implement a VOC-FREE process. We have all the necessary (OPTIFLUX) spray equipment, and we're cur
Electronics Forum | Wed Sep 02 08:44:50 EDT 1998 | Kelly Morris
| Hi, | We are having problem with yield loss due to electrical fail. Further investigation shows that the failure is due to solder bridging under BGA. Has been there any study or experience on how this could occur and what we can do to prevent it.
