Electronics Forum | Mon Apr 23 11:44:55 EDT 2001 | CAL
650 Standards are also located in the back of IPC JSTD-001. I am currently looking at 4 pages on bow and twist. Percent bow = R1-R2/L x 100 (R1= Highest point; R2=lowest or resting point; l= length) Percent twist=(R1-R2)/(2xL)x 100 Sorry if this is
Electronics Forum | Mon Oct 09 14:05:48 EDT 2017 | ilavu
Hello, I am trying to setup PSV on the GSM.The reason I am asking here is Universal does not sale this kit anymore. Machine Info is GSM UPS Software : 6.2.2.2 (Upgraded from OS/2) MCOS, EPC-16, 650HF, MMIT6 and 3 UIMC3 USB HUB installed PSV soft
Electronics Forum | Fri Apr 02 12:41:12 EDT 2010 | CL
Nicolas, 4.1.2.1 and 4.1.2.2 mention the requirements for drying an MSD to resett the clock life. 4.1.2.2 states that once a component is dried, refer to 5.3 for safe storage. Under that specification is 5.3.3.2 DRY Cabinet at 5% RH- This states tha
Electronics Forum | Thu Jan 18 17:26:30 EST 2018 | davef
I'm aware of no electrical test for detecting voids and air bubbles. If someone was x-raying my boards and saw voids and air bubbles and they weren't happy about it, first thing I'd do is convince them that the boards a within standard. You know some
Electronics Forum | Thu Sep 27 10:40:46 EDT 2007 | rgduval
Joris, Yep, very common to have those small blow holes in lead-free alloys. We used to get them very consistently on white-tin finished boards, and less frequently with gold finished boards, for what ever that is worth. IPC-610 actually allows t
Electronics Forum | Wed Apr 26 10:56:13 EDT 2006 | JEM
Mydata sales for TPSys 2.4 says and i quote" Reduce your setup and changeover times with new features like the ability to use auto teach for vision illumination, barcode loading of trays, factory wide sharing of vision package data.TPSys 2.4 contains
Electronics Forum | Thu Mar 22 17:33:38 EST 2001 | davef
Steve, IPC TM-650 Test Methods Manual is a load. IPC TM-650 Test Methods Manual: Section 2.1 Visual Test Methods Section 2.2 Dimensional Test Methods Section 2.3 Chemical Test Methods Section 2.4 Mechanical Test Methods Section 2.5 Electrical Test M
Electronics Forum | Tue Feb 07 05:40:16 EST 2006 | pavel_murtishev
Good day, J-STD-033A: 4.1.2.2 Moisture Sensitivity Levels 5-5a For moisture sensitivity Levels 5 and 5a with floor life exposure not greater than 8 hours, a minimum desiccating period of 10X the exposure time is required to dry the SMD packages en
Electronics Forum | Wed Dec 19 20:42:55 EST 2007 | davef
gersla: You're correct that carriers of low temperature material will disfigure and become useless at 125*C bake temperatures. The reason you can not find 70*C bake data is: J-STD033B, "4.2.2 Low Temperature Carriers. SMD packages shipped in low tem
Electronics Forum | Tue Jan 14 11:53:44 EST 2020 | avillaro2020
Hi Phil, thanks. I am successful using the same connector on small thinner boards 2-2.5kg) i cant make it work, tried all kinds of profiles with vapour phase but to no avail. Yes you read it right 4.3-6.3mm pcb thickness and 2-2.5Kg. And it is 44 lay
