Electronics Forum | Tue Dec 30 09:31:52 EST 2014 | rgduval
I've always approached it like this: Design your processes and perform your work to class three standards, and inspect to the standard that is acceptable. That is, all work should be performed to the highest degree of quality. When the work is ins
Electronics Forum | Mon Jan 26 10:15:51 EST 2009 | john123
Can anyone help me determine the acceptability level for lead deformation (see attachment). The outer two leads on the left side were bent during the pick and place centering operation. I've looked in the IPC-A-610 book and could only find informa
Electronics Forum | Mon Jun 21 16:11:41 EDT 1999 | John Thorup
| | I am finding that some of our IC's are coming from the supplier with the humidity gauge in the bag reading 10-20%. Has anybody done any tests to determine what humidty level in a package will cause problems during reflow? | Usually a proper m
Electronics Forum | Mon Jan 17 18:36:26 EST 2000 | William
Voids can be acceptable @ 24% per 5 balls area, and 8% per single ball area. In fact, Proceeding Book 1996; Vol. I, Page #126 conclusions saids: that solder joint voiding at the maximun levels pbserved in this study (were voided area was up to 24 per
Electronics Forum | Mon Sep 08 14:29:04 EDT 2008 | davef
�Another direct measurement to determine resistivity values (i.e. of remaining no-clean residues) can be performed through impedance spectroscopy. The surface resistance underneath chip resistors and capacitors can be determined to show the improveme
Electronics Forum | Wed May 16 07:08:23 EDT 2001 | Michael Fogel
We are using press fit connector for some time without any particular visible problems, but still we need some kind of workmanship standard as a general guideline of what is wrong, acceptable and preferred levels for this job. Can someone direct me w
Electronics Forum | Mon Jul 10 12:38:19 EDT 2006 | fredericksr
Hello All, Has anyone tested the effectiveness of any process to remove lead from tinned soldering irons to RoHS acceptable levels? We have been dedicating new tips for RoHS assembly, but as our RoHS product line increases it will be important
Electronics Forum | Wed Aug 17 06:30:50 EDT 2016 | thaneshsivanadian
Hi Guys, i have some doubt, may i know how to calculate the PCBA warpage after complete of SMT and through hole process? Do we have any calculation for that? And What is the acceptance level of warpage after complete assembly? Thanks, Thanesh
Electronics Forum | Wed Mar 15 12:39:24 EDT 2017 | cyber_wolf
Customer precedes standard, but customer must be educated and informed on what is achievable with their design and what is accepted as industry standard practice. My guess is that the negative effect of those voids is negligible. {Voids at the sold
Electronics Forum | Thu Dec 06 19:46:08 EST 2001 | davef
First, we�re assuming that we�re talking hot air solder leveled [HASL] bare boards, eh? Consider using A-600 - Acceptability of Printed Boards as the basis for discussing the bare board problems. It is the bare board analog of A-610 - Acceptability
