Technical Library | 2014-07-10 17:37:18.0
This paper studies and compares the effects of pull–pull and 3-point bending cyclic loadings on the mechanical fatigue damage behaviors of a solder joint in a surface-mount electronic package.The comparisons are based on experimental investigations using scanning electron microscopy (SEM) in-situ technology and nonlinear finite element modeling, respectively. The compared results indicate that there are different threshold levels of plastic strain for the initial damage of solder joints under two cyclic applied loads; meanwhile, fatigue crack initiation occurs at different locations, and the accumulation of equivalent plastic strain determines the trend and direction of fatigue crack propagation. In addition, simulation results of the fatigue damage process of solder joints considering a constitutive model of damage initiation criteria for ductile materials and damage evolution based on accumulating inelastic hysteresis energy are identical to the experimental results. The actual fatigue life of the solder joint is almost the same and demonstrates that the FE modeling used in this study can provide an accurate prediction of solder joint fatigue failure.
Technical Library | 2017-11-15 22:49:14.0
While a significant level of voiding can be tolerated in solder joints where electrical conductivity is the main requirement, voiding at any level severely compromises thermal conductivity. For example, in LED lighting modules effective conduction of heat through the 1st level die attach to the substrate and then through the 2nd level attach to the heat sink is critical to performance so that voiding in the solder joints at both levels must be minimized. (...) In this paper, the authors will review the factors that influence the incidence of voids in small and large area solder joints that simulate, respectively, the 1st and 2nd level joints in LED modules and discuss mitigation strategies appropriate to each level. They will also report the results of a study on the effect on the incidence of voids of flux medium formulation and the optimization of the thermal profile to ensure that most of the volatiles are released early in the reflow process.
Technical Library | 2020-02-05 18:20:06.0
Consortium Projects - Thermal Cycling Reliability Consortium projects allow for joint research to investigate the reliability of multiple solder alloys under a variety of environmental stress conditions. Project jointly sponsored by iNEMI and HDP User Group and including CALCE and Universal consortium currently assessing 15 third-generation solder alloys..
Technical Library | 2015-11-19 18:15:07.0
The move to lead free (Pb-free) electronics by the commercial industry has resulted in an increasing number of ball grid array components (BGAs) which are only available with Pb-free solder balls. The reliability of these devices is not well established when assembled using a standard tin-lead (SnPb) solder paste and reflow profile, known as a backward compatible process. Previous studies in processing mixed alloy solder joints have demonstrated the importance of using a reflow temperature high enough to achieve complete mixing of the SnPb solder paste with the Pb-free solder ball. Research has indicated that complete mixing can occur below the melting point of the Pb-free alloy and is dependent on a number of factors including solder ball composition, solder ball to solder paste ratio, and peak reflow times and temperatures. Increasing the lead content in the system enables full mixing of the solder joint with a reduced peak reflow temperature, however, previous research is conflicting regarding the effect that lead percentage has on solder joint reliability in this mixed alloy solder joint.
Technical Library | 2019-10-16 23:18:15.0
Despite being a continuous subject of discussion, the existence of voids and their effect on solder joint reliability has always been controversial. In this work we revisit previous works on the various types of voids, their origins and their effect on thermo-mechanical properties of solder joints. We focus on macro voids, intermetallics micro voids, and shrinkage voids, which result from solder paste and alloy characteristics. We compare results from the literature to our own experimental data, and use fatigue-crack initiation and propagation theory to support our findings. Through a series of examples, we show that size and location of macro voids are not the primary factor affecting solder joint mechanical and thermal fatigue life. Indeed, we observe that when these voids area conforms to the IPC-A-610 (D or F) or IPC-7095A standards, macro voids do not have any significant effect on thermal cycling or drop shock performance.
Technical Library | 2016-01-12 11:07:56.0
With the increasing demand of device miniaturization, high speed, more memory, more function, low cost, and more flexibility in device design and manufacturing chain, YINCAE has published a white paper on a first individual solder joint encapsulant which can eliminate underfilling process with at least five times solder joint increase and provide more flexibility for fine pitch and high density application. In order to meet the demand of manufacturing of high speed and low cost, YINCAE has invented a room temperature stable and jettable solder joint encapsulant adhesive – SMT 266. The invention of SMT 266 has allowed our customers to have more flexibility in their high-speed production line such as worry free on the work life of adhesive and workable jetting process.
Technical Library | 2019-03-06 21:26:14.0
Electronic assemblies use a large variety of polymer materials with different mechanical and thermal properties to provide protection in harsh usage environments. However, variability in the mechanical properties such as the coefficient of thermal expansion and elastic modulus effects the material selection process by introducing uncertainty to the long term impacts on the reliability of the electronics. Typically, the main reliability issue is solder joint fatigue which accounts for a large amount of failures in electronic components. Therefore, it is necessary to understand the effect of polymer encapsulations (coatings, pottings and underfills) on the solder joints when predicting reliability.This paper presents the construction and validation of a thermo-mechanical tensile fatigue specimen. The thermal cycling range was matched with potting expansion properties in order to vary the magnitude of tensile stress imposed on solder joints
Technical Library | 2016-01-12 11:01:25.0
More and more Land Grid Array (LGA) components are being used in electronic devices such as smartphones, tablets and computers. In order to enhance LGA mechanical strength and reliability, capillary flow underfill is used to improve reliability. However, due to the small gap, it is difficult for capillary underfill to flow into the LGA at SMT level. Due to cost considerations, there are usually no pre-heating underfill or cleaning flux residue processes at the SMT assembly line. YINCAE solder joint encapsulant SMT256 has been successfully used with solder paste for LGA assembly. Solder joint encapsulant is used in in-line LGA soldering process with enhanced reliability. It eliminates the underfilling process and provides excellent reworkability. The shear st rength of solder joint is stronger than that of underfilled components. The thermal cycling performance using solder joint encapsulant is much better than that using underfill. Bottom IC of POP has been studied for further understanding of LGA assembly process parameters. All details such as assembly process, drop test and thermal cycling test will be discussed in this paper.
Technical Library | 2019-10-10 00:26:28.0
Voids are a plague to our electronics and must be eliminated! Over the last few years we have studied voiding in solder joints and published three technical papers on methods to "Fill the Void." This paper is part four of this series. The focus of this work is to mitigate voids for via in pad circuit board designs. Via holes in Quad Flat No-Lead (QFN) thermal pads create voiding issues. Gasses can come out of via holes and rise into the solder joint creating voids. Solder can also flow down into the via holes creating gaps in the solder joint. One method of preventing this is via plugging. Via holes can be plugged, capped, or left open. These via plugging options were compared and contrasted to each other with respect to voiding. Another method of minimizing voiding is through solder paste stencil design. Solder paste can be printed around the via holes with gas escape routes. This prevents gasses from via holes from being trapped in the solder joint. Several stencil designs were tested and voiding performance compared and contrasted. In many cases voiding will be reduced only if a combination of mitigation strategies are used. Recommendations for combinations of via hole plugging and stencil design are given. The aim of this paper is to help the reader to "Fill the Void."
Technical Library | 2012-08-30 21:24:29.0
This paper provides definitions of the different voiding types encountered in Gull Wing solder joint geometries. It further provides corresponding reliability data that support some level of inclusion voiding in these solder joints and identifies the final criteria being applied for certain IBM Server applications. Such acceptance criteria can be applied using various available x-ray inspection techniques on a production or sample basis. The bulk of supporting data to date has been gathered through RoHS server exempt SnPb eutectic soldering operations but it is expected to provide a reasonable baseline for pending Pb-free solder applications.
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