Electronics Forum | Thu Aug 21 21:08:41 EDT 2003 | Tom B
Correction on note 1: Some can't stand a second peak profile
Electronics Forum | Fri Aug 22 09:21:21 EDT 2003 | russ
Search the Archives, Dave F I believe posted the formula not to long ago. Russ
Electronics Forum | Wed Feb 28 19:48:11 EST 2001 | davef
If we were talking about a single board problem, we�d be thinking about the laminate, but since you imply the problem is broad-based across multiple assemblies, consider the following machine parameters: * Crank-up preheat time / temperature to driv
Electronics Forum | Mon May 25 21:10:28 EDT 2009 | padawanlinuxero
Hello !! I have a problem with my wave solder oven, in one of the products we made has connectors on one side of the pcb and in the other one has SMT components the process is kinda tricky on the SMT components we use an adhesive and put to the refl
Electronics Forum | Wed Jan 12 21:37:04 EST 2005 | KEN
How thick is this pallet? 6mm, 8mm, 10mm? I would look at: Make sure you're pot height is correct (lead clearance). If you are burrying the pallet in the fountain, your going to "push" a large volume away. The solder "push" should not plow over t
Electronics Forum | Thu Jan 07 09:24:08 EST 1999 | Chrys
| | We are currently fighting a dross battle on our non-inerted waves. We are currently using a bar solder that barely meets QQS-571 for Alloy/Impurity. | | | | Is anybody using HI FLO in a non inerted wave? Do you see a measureable decrease in dr
Electronics Forum | Tue Jan 12 09:29:37 EST 1999 | Dave F
| | | We are currently fighting a dross battle on our non-inerted waves. We are currently using a bar solder that barely meets QQS-571 for Alloy/Impurity. | | | | | | Is anybody using HI FLO in a non inerted wave? Do you see a measureable decrease
Electronics Forum | Mon Dec 17 12:06:58 EST 2007 | pjc
5 Steps to Eliminate Bridges: 1. Establish (wave) Parallelism First and foremost, you must establish board-to-wave parallelism. This is the prerequisite to any wave solder process control. For an understanding of the power of this approach go to ht
Electronics Forum | Thu Aug 21 09:01:46 EDT 2003 | caldon
Dan- We here do double sided reflow: we place one side and reflow....place the other side and reflow. On the second flow the underside of the PCB- we will reduce the bottom side preheat. fortunatly for us the largest component we only place a 40pin P
Electronics Forum | Tue Aug 26 21:20:58 EDT 2003 | iman
You may check with the TDS of respective "active parts" IC manufacturers for their recommended no. of thermal cycles permissible in the reflow process. Last I checked 3 cycles for our RF-apps IC was still allowed. For 48pin-QFPs this can be allowed
