Electronics Forum | Tue Dec 29 17:29:46 EST 1998 | Dave F
| can some kind of through hole type connector pass through | the smt process (with IR technology)???? | the temperature factor or material factor????? | Flag: Most PTH components are not spec'd for reflow processes. PTH component suppliers, nomin
Electronics Forum | Tue Jul 09 10:15:17 EDT 2002 | msjohnston
Cal, Our parent company is a FAB and they are about to release a new generation of parts. Usually the die is qualified in a simple TSOP form factor. This time the first product quals will take place in the BGA and CSP from factors rather than the t
Electronics Forum | Wed May 28 14:35:47 EDT 2003 | davef
Wow, you're very correct. I guess we use silicone to calibrate our machine, as follows: XPS spectral measurements of dimethyl silicone should include O(2s) at 25 eV, Si(2p) at 102 eV, Si(2s) at 153 eV, C(1s) at 285 eV, and O(1s) at 533 eV. The C(1s
Electronics Forum | Thu Dec 11 20:38:37 EST 2003 | davef
Here is a study on printing factors study on CSP [we understand that you asked about fine pitch, but hey, it's close and FREE] http://nepp.nasa.gov/docuploads/2A524D62-7032-4C0D-BBDED6CFFC2FA07B/SMTA-I-Joint-Paste-2004.pdf It's interesting that whi
Electronics Forum | Wed May 17 23:59:16 EDT 2006 | KEN
Repeatability data please. Please provide source. Can you provide the standard deviation and sample size please. Does this data represent all major angles? Was this data independently verified? Was this data collected using glass parts or p
Electronics Forum | Thu Dec 04 00:22:11 EST 2008 | maacolomer
Hi Steven, The 24 hrs bake is an overkill according with various J-STDs. Assuming a bake temperature over the 100 Celsius degrees. There are several factors to be considered before deciding the best methodology to wash misprinted board. However,
Electronics Forum | Mon Aug 28 18:21:13 EDT 2000 | Earl Moon
Steve, If interested in more vital input - contact me offline. It's not just the factors you indicate but those of reliability. Earl Moon
Electronics Forum | Wed Apr 12 13:25:51 EDT 2000 | Billy G
Chris, is right! Pad geometry is one of the biggest factors of tomb-stoning. Check Pad size against parts size.
Electronics Forum | Mon Jan 22 22:37:27 EST 2001 | davef
50 ppm oxygen was on half joints reflowed in air. 3d Human factors PCB pad cleanliness: Handling of bare board pads creates excessive voiding. Print rejection: Cleaning of OSP pads with acetone or isopropanol increases voiding.
Electronics Forum | Mon Feb 05 21:19:45 EST 2001 | davef
We process a fairly wide variety of board designs. So, pot temperature is one of the controllable factors in DOE.
