247 ipc and history results

Electronics Forum: ipc and history (Page 5 of 25)

voids- leaded and chip components

Electronics Forum | Mon Jan 12 18:06:38 EST 2004 | Kris

Hi, Is there any standard for voids in a leaded device or a chip component ? IPC 7095 lists maximum allowable voiding for BGA devices but has no information on leaded devices Appreciate your help- thanks

V-scoring design and equipment questions

Electronics Forum | Mon Jun 12 14:33:40 EDT 2006 | pjc

IPC spec is V-score shall not be more than 1/2 board thickness. They should be V scoring 1/4 off top and 1/4 off bottom equally.

V-scoring design and equipment questions

Electronics Forum | Tue Jun 13 08:33:11 EDT 2006 | davef

IPC-2222, 5.3.1 defines the parameters of making scoring cuts and the tolerance of the cuts, but does not specify the cuts. Our spec for 0.062" thick FR-4 boards is: 0.018-0.024"

SPI and AOI IPC Requirements

Electronics Forum | Thu Jan 18 07:22:10 EST 2024 | klauss

Is there any stardarts to help us what tolerance values (max or min. height, weight, volume etc) should we use while programming AOI and SPI.

Bow and twist of PCB's

Electronics Forum | Fri Apr 20 05:32:39 EDT 2001 | dougie

Hi, I've just splashed out �60 on IPC-A-600F trying to find out the formula for measuring the bow and twist of raw PCB's. Much to my dismay there are 10 lines on the subject in the whole standard. Worse still is that it tells me nothing I don't alre

board stretch and IPC -D-300G

Electronics Forum | Mon Nov 12 13:04:35 EST 2001 | slthomas

We've got a problem with a fine pitch board that has about .005" registration error at each end (towards the center of the board) when it's printed. Apparently we've got a case of board stretch generated at the fab shop. I still have to do some mea

conformal coatings and flux compatability

Electronics Forum | Tue May 23 12:18:25 EDT 2000 | mike weekes

Which companies would you consider for protective coatings, (conformal coating) and other levels of protection? I am taking a fresh look at alternatives. Know any good tests for testing compatability of coating with flux - aqueous or no clean? SMT

Bow and twist of PCB's

Electronics Forum | Fri Apr 20 07:12:22 EDT 2001 | wbu

Dougie, oh yes, it�s a bit short that chapter. I have the Revision e in front of me and this one contains in the appendix the needed IPC-TM-650 Test method for bow and twist. Can�t think that they don�t have that in the new revision. Hope you find

Bow and twist of PCB's

Electronics Forum | Mon Apr 23 11:44:55 EDT 2001 | CAL

650 Standards are also located in the back of IPC JSTD-001. I am currently looking at 4 pages on bow and twist. Percent bow = R1-R2/L x 100 (R1= Highest point; R2=lowest or resting point; l= length) Percent twist=(R1-R2)/(2xL)x 100 Sorry if this is

Re: BGA and Land Patterns

Electronics Forum | Tue Apr 27 13:00:05 EDT 1999 | Justin Medernach

| What is the current spec for sizing PCB pads for a land grid array? How about for a ball grid array? Are there industry spec's I can reference? | | Thanks, | | Frank | Frank, Refer to the device manufacturers. they are going to have a recomme