Electronics Forum | Tue Mar 22 20:33:24 EST 2005 | davef
Q1. What are you guys doing for filled/tented/plugged vias on the BGA site? A2. 2221A, 4.5.1 tells you the vias have to be tented on both sides. Q2. What type of issues can this cause if using no filled/tented/plugged vias on the BGA site? A2. BGA
Electronics Forum | Tue Nov 27 14:24:13 EST 2001 | mparker
Short term fixes can be: have the vias "plugged" with solder by the fab house. This works if your fab is HASL finish. Tent the vias with solder mask, top side only. You may get a flux entrapment issue in the vias with this manner. Long term fix can
Electronics Forum | Tue Mar 22 08:05:59 EST 2005 | jdumont
Morning all, my question is regarding the use of filled/tented/plugged vias on the BGA site. What are you guys doing for this? What type of issues can this cause if using none, or the improper via design. Regards, JD
Electronics Forum | Thu Feb 15 13:49:10 EST 2007 | russ
only plug one side, you can definitely blow out during reflow process with a sealed via/ it is impossible for flux to be trapped in a blind via. Russ
Electronics Forum | Thu Mar 03 08:06:36 EST 2011 | scottp
I've seen this with through hole via in pad with soldermask plugging from the opposite side. Baking the boards solved it. Not using such a horrible via in pad method would also have solved it, but that wasn't an option. Is this ball sitting on a v
Electronics Forum | Tue Feb 19 11:08:22 EST 2002 | Chris Anglin
Guideline for Tenting Interstitial BGA Vias It is difficult to give a complete recommendation on via tenting without an idea what process conditions are required (ex: wave pass, double reflow, rework etc.). Via Pads (as Test Points) - On Bottom
Electronics Forum | Sun Dec 26 21:24:55 EST 2004 | tellinghuisen
Dreamsniper What is the rationale for the double plugging? And why from both sides?
Electronics Forum | Thu Dec 21 13:33:46 EST 2006 | ppcbs
The problem with super glue is that is has a cyanide base that turns into a toxic gas and evaporates when heated. See IPC-7095. Via's should be fully plugged with solder mask at the fab house. If your PCB designers are not up to speed on IPC requi
Electronics Forum | Mon Jul 26 18:01:30 EDT 1999 | Earl Moon
| Presently protos of micro-bgas (80i/o) pitch .030/.031 | 12BGA per assembly | | The board is a (.062, 4 layers) FR-4 using Dry film | Pads .014inch | Vias within footprint .020inch | Vias to be filled by bottom side(solder side) only .030in dia. F
Electronics Forum | Fri Jul 13 18:25:09 EDT 2007 | seankim10
It sounds like more has to do with plating. you may also check out the voiding issue especially if you have new FAB or the supplier. I had problems with a RF chip in QFN package due to insufficient grounding that voiding caused. This ground is often
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