Electronics Forum | Tue Mar 06 15:59:33 EST 2007 | pima
hello I would like to ask you for advise. I have problem with one of my SMT line and skewed parts at the end of line after reflow. My line is composed: DEK, 3d visual inspection of paste printing, IP3, 8 zones reflow oven. I m builidng there produc
Electronics Forum | Wed Dec 31 08:55:09 EST 1997 | justin medernach
| Has anyone had any experience with thermal shocking | and cracking of SMD capacitors during the rework process? | My company was advised to preheat capacitors to 125 C | at a rate of 2 C/sec before replacing them onto boards. | Would this maybe
Electronics Forum | Wed Aug 07 08:43:32 EDT 2002 | davef
Comments on copper plate temperature monitoring are: * Some people use this type of temperature monitoring to start the day as an element of an oven capability measurement and monitoring program. * Using a copper or other metal plate, like aluminum,
Electronics Forum | Thu May 25 03:31:17 EDT 2006 | slaine
Hi I manufacture ceramic parts that have a terminations that are palladium/platinum/silver or any combination of the 3. Termination Ink usually consists of 3 main parts the alloy, glass frit and binder. Binder is to help bind everything together whi
Electronics Forum | Thu Feb 15 19:41:38 EST 2001 | davef
What do you mean by "But after performing temperature cycle test, the former aging rate (from the shear strength ) seems faster than the latter."? Comments are: I can't recall having heard the term "precipitation hardness" [not that that means anyt
Electronics Forum | Thu Feb 11 09:45:06 EST 1999 | Dave F
| | | Helo, | | Is it common for actual print height of solder paste to exceed the stencil thickness. For example If the stencil is 6mill thick and the actual height of the print is apx. 10 or 11mill. What causes the paste height to be greater t
Electronics Forum | Wed Sep 12 18:11:03 EDT 2001 | davef
First, what on the area array package are you analyzing � * Package cracking? * Cracked solder balls? * Er, what? Second, most failure analysis discussions consider dye penetration to be a non-destructive test, but then again most failure analysis
Electronics Forum | Tue Nov 07 21:49:05 EST 2000 | Dave F
Cheers to you Your gold plating is specified for the gold wire bonding between the die of your BGA and the pads on the BGA substrate. For solderable surfaces this is heavy on gold for use on pads. Gold SB thinner on pads to limit the amount of gol
Electronics Forum | Fri Jul 09 18:36:48 EDT 2010 | rway
We don't use flex pcbs but have the same issue here. Most of our pcbs are HASL finish. I have looked at silver and gold immersion and both look really good under my color camera on my AOI. However, gold is more pricey. There is no additional cost
Electronics Forum | Mon Aug 27 15:06:29 EDT 2001 | davef
This otta push Wolfgang over the top ... Recommended reading G.G. Harman, Wire Bonding in Microelectronics : Materials, Processes, Reliability, and Yield, 2nd edition, McGraw-Hill Electronic Packaging and Interconnection Series, 1997. G.G. Harman, R
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