Electronics Forum: planarization (Page 5 of 12)

Void control

Electronics Forum | Mon Oct 15 08:24:24 EDT 2012 | scottp

You could pay the extra to have the microvias plated shut and planarized. If your voids are larger than 25% of the BGA joint area then I would suspect a solderability problem. Either the board plating or a solder paste problem. If they're less tha

Isolating QFN Ground

Electronics Forum | Fri Mar 15 16:26:04 EDT 2013 | hegemon

Mask the pad on the PWB using liquid solder mask. Cure the mask and away you go. Use a mini stencil and a squeegee to maintain planarity and minimize issues at paste print. We have used this technique before. In other cases we have masked the bott

200 pin connector reflow

Electronics Forum | Thu Nov 07 21:28:31 EST 2019 | sssamw

The connector is so long, and has big metal parts, it will be little deformed during reflow I guess, andthe pins planarity should be critical for 200 pins. Did you measure the non wetting pins profile to see if temperature ok? And maybe you can try u

HASL surface finish

Electronics Forum | Fri Jun 12 21:36:04 EDT 2020 | SMTA-Josh

Has anyone had an issue with changing from a HASL surface finish to a LF HASL finish if it is still being used in a leaded process? Also we are having issues with the planarity on the fiducials with the HASL finish. Are there any suggestions or ch

gas to extend allowed print-to-place time?

Electronics Forum | Mon May 02 12:35:33 EDT 2016 | adamjs

Or try : http://www.sipad.com/ I think sipad is incredibly cool and would be the perfect solution, but is way too expensive. We're paying $0.80/each for four-layer ENIG boards, 50cm^2 with 0.125mm trace/space and 0.8mm-pitch LGA landings in lots of

QFN welding problem by reflux oven 10 zones

Electronics Forum | Tue Feb 11 13:22:22 EST 2020 | rgduval

Sebas, I suspect that your finding of needing the fillet for the card to work is a false finding. One that I dealt with for many years in assembly. As a bottom terminated device, a fillet to the side terminals of the device is not required. Adequ

Re: Dome Fiducials

Electronics Forum | Wed Feb 16 05:58:12 EST 2000 | Wolfgang Busko

Hi Dane, if with "dome" is meant the irregularity of a HASL finish than we had a lot of problems especially like Dean mentioned with finepitch parts and circular fids. It ended up with cleaning the fids with erasers before using the boards. Later we

Re: ENIG finishing

Electronics Forum | Mon Feb 14 12:16:10 EST 2000 | Dave F

Steve: Several points: * I don't have any real problems with the paper that you referenced. The hair on the back of my neck did rise a bit when the paper touched-on the higher level of process control required for ENIG. * JAX makes a good point.

Re: silver finishes on pcbs

Electronics Forum | Wed Dec 13 10:24:52 EST 2000 | Wolfgang Busko

Hi Jack, I once tried this finish ( without changing any process parameters ) and encountered wetting problems even in the first reflow process. It was thought as cheaper alternative to Ni/Au we use for planarity reasons. Heard of the same problems

Solid Solder Deposit

Electronics Forum | Mon Apr 23 11:31:23 EDT 2001 | Cal

You may have answered your own question. If SSD is the end all save all there would be more people using this technology. I view SSD as an option to have flat planar pads. I also know the price per Board is more then "standard" boards. The sample b


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