Electronics Forum | Thu Jun 14 23:21:30 EDT 2001 | oem boy
I am working on 0201 development for my company in the UK, and I am planning a rather extensive DOE for my reflow oven profile. I am planning on studying various ramp rates, soak times, times above liquidus, peak temps, etc... My biggest concern
Electronics Forum | Fri Dec 04 19:17:03 EST 1998 | Jason
Jeff, I used conductive epoxy for diebonding and chipcaps on hybrid xtal controlled osc. We were applying via stencil printer, then curing in a KME vertical cure, a real foot print saver. Even under controlled environmental conditions, it was a re
Electronics Forum | Mon Jan 13 18:22:55 EST 2003 | davef
100 sec) and decrease reflow temp to 205C. * Understand that voids are primarily process indicators. There is experimental evidence that voids retard crack propagation locally around the void on a temporary basis. There is no standard, IPC or otherw
Electronics Forum | Fri Mar 07 05:36:21 EST 2003 | O' Connor
Hi Again, In answer to DaveF - Yes solder is fine where the solder paste is deposited , but the part of the pad visible after pasting is still visible after reflow. Previously the solder paste & all the gold diffused & flowed giving a complete silve
Electronics Forum | Tue Oct 15 09:52:38 EDT 2019 | SMTA-Davandran
I seeing connector with butt (I) lead drop off after drop test conducted. the current shear force is about 3kgf. How can this problem improved.
Electronics Forum | Tue Oct 09 20:40:48 EDT 2001 | davef
No one suggested that you speak for other suppliers and nor would they want� you �to speak for them." You shouldn�t make this something that it isn�t. All that was requested courteously was suggestions of alternate suppliers that could be considere
Electronics Forum | Wed Nov 28 20:45:03 EST 2001 | dougk
We�ve also had glass diode difficulties- poor adhesion while all other parts are fine (including tall parts). I�ve received some interesting information from Heraeus: It seems the newer glues create a much stronger bond to SMD�s, except glass diodes.
Electronics Forum | Thu Mar 31 19:41:36 EST 2005 | Dreamsniper
Can anyone guide me to what test do I need to be able to identify the strength of my fine pitch component solder joint? What value is available that I can use as a reference? Say 1.5 kg, 2.0 kg, 2.5 kg etc. I would like to have my fine pitch compone
Electronics Forum | Thu Apr 04 05:33:19 EST 2002 | ianchan
Hi, hope this helps : 1) BCC (bump chip carrier) production for us, was with a 5mils Stencil. The outer perimeter smallish pads are not much of a problems. For the central large pad, we split the paste print (corresponds to the Stencil apperture op
Electronics Forum | Mon Oct 25 21:49:14 EDT 2004 | davef
First, any results of pull or shear tests are unscientific at best. [We pop our BGA from boards with, appropriately enough, a beverage can opener.] Second, we have no have problems with your ENIG specification. Third, as with your customer, we'd e