Electronics Forum | Sun Jun 27 12:24:43 EDT 1999 | Scott Cook
| We are anticipating switching from RMA to OA flux for both reflow and wavesolder in the next few months. If you use a batch cleaner running DI water only I would like to hear your experiences. How is it for cleaning under low standoff components
Electronics Forum | Thu May 26 16:41:00 EDT 2011 | scottp
Here's what I do: - Test Surface Insulation Resistance (we're in the high reliability market and use a test significantly harder than IPC's). I also test SIR in combination with other assembly materials like conformal coatings and wave solder flux
Electronics Forum | Wed Sep 19 14:23:31 EDT 2001 | jschake
Pad Metallurgy Used: Copper OSP pads were used for all of the results that I have been reporting. The same design test boards with Nickel/Gold pads are available and awaiting further assembly tests. I will consult with a board technology and metall
Electronics Forum | Mon Jun 28 13:12:34 EDT 1999 | Graham Naisbitt
| | We are anticipating switching from RMA to OA flux for both reflow and wavesolder in the next few months. If you use a batch cleaner running DI water only I would like to hear your experiences. How is it for cleaning under low standoff component
Electronics Forum | Wed Aug 21 17:44:32 EDT 2002 | davef
Splitting hairs, I expect SIR of all solderability protection, including OSP, to decrease after reflow. What�s more, I expect the SIR of all solderability protection to pretty much decrease over time. The �comb pattern� test specimens meet requirem
Electronics Forum | Mon Jan 04 18:56:25 EST 1999 | Marc P.
| We have a Vitronics SMR400N oven and many times need to use N2 inerting. My problem is that it takes close to an hour of operation to purge the system to achieve the desired O2 levels (~40PPM). This is not only time consuming but results in an inor
Electronics Forum | Fri Jan 15 16:55:50 EST 1999 | Chrys
| | | Hello, | | | | | | We are qualifying new sources of PWB vendors. We've got the first lot of "produciton" boards in and we want to put them through the paces before turing the vendors on. | | | | | | So far, the tests I can think of performin
Electronics Forum | Wed Jun 24 23:52:41 EDT 1998 | Phillip Hunter
| Has anyone seen a problem with solder under chip components, in-between the glue and the component or in-between the mask and the component? We seen both. | What could be causing this? This has only been detected on one of our products. All the re
Electronics Forum | Thu Dec 07 19:54:55 EST 2006 | davef
We agree with "guest" above. This a "chip bonder" type material used to improve the reliability of array type devices. "A relative comparison of the N50 values is given below: No underfill = 1.0X (baseline) Corner bond = 1.3X Non reworkable underfi
Electronics Forum | Fri Nov 20 08:51:34 EST 2009 | Sean
Hello, This is interesting topic that I would like to share and discuss with you.. I came across few projects from various SMT factories where its product(Computer) reach field, experience No Post/boot defect. This problem become very obvious when
