Electronics Forum: after (Page 512 of 695)

QFN Rework

Electronics Forum | Fri Jul 18 14:36:17 EDT 2008 | proy

I have a QFN which we are adding after process. (it was not available the day we ran the 4 prototypes.) We have removed most of the solder on all the pads, My plan was that a LITTLE solder on the center pad would wet and center the device (using a g

Plugging of via through holes

Electronics Forum | Wed Jul 23 03:04:57 EDT 2008 | gfro

Hello, We are using a PCB with thickness 3.2mm 4 layer and lot of through hole via's of diameter 0.4mm. We specified our PCB vendor to do plugging. Now we have big problems, that after 1..4 weeks we measure a low resistance between track's/via's of

ive solder profiles

Electronics Forum | Mon Aug 04 16:20:35 EDT 2008 | patrickbruneel

After analyzing the pictures I don't think the solder balls are caused by the solder mask. If the problem would be solder mask related the solder balls would only show up on the solder mask but there are also solder balls on the plastic tabs. To me i

Validating Oven Thermal Profiles

Electronics Forum | Thu Aug 14 18:04:36 EDT 2008 | smt_guy

I have made couple of investigations with our oven. I set-up 5 product profiles and run a thermal profile measurement and record them. Then I set-up one more product profile and rename that as Validation Profile then measured the thermal profile. A

Block repeat and fiducial relation

Electronics Forum | Tue Aug 19 13:35:51 EDT 2008 | stefi

Hello, I need an advice regarding the next issue: in the case of Assembleon Topaz or Emerald SMT machines, is there necessary to teach first the block repeat coordinates and after that the PCB fiducial coordinates when you do not have these coordina

Block repeat and fiducial relation

Electronics Forum | Fri Aug 22 15:27:13 EDT 2008 | wayne123

this is the order that I use. 1. Teach pcb origin 2. Teach fiducial location 3. dial in vision on fid in mark info. 4. go into mount and verify that the primary image is on in x/y (after perfoming a teach trace condition) and then do any offsetts if

Solder not reflowing properly

Electronics Forum | Wed Aug 27 14:38:20 EDT 2008 | rgduval

Does your paste provider recommend a TAL? For the leaded and lead-free pastes that we use, the manufacturer recommends 60 seconds above liquidous. I note that your profile shows the TAL as 30 seconds, which may not be sufficient. That said, tho

problem in solderability

Electronics Forum | Wed Sep 10 14:39:30 EDT 2008 | vladig

No, we didn't do the test you mentioned, but did EDS on the joints and didn't see carbon their (which would indicate the presence of any organic-based contaminant). For the customer the issue was closed and passed to the board shop. We did work with

Imm Silver tarnish?

Electronics Forum | Sat Aug 30 11:42:49 EDT 2008 | davef

Some immersion silver [IAg] products can go brown with aging. On a newly plated board, we expect you to see Ag, C, & O. The amount will vary according to supplier and thickness. Questions are: * How uniform is the brown coloration of the IAg on the

Clean vs No-Clean

Electronics Forum | Mon Sep 08 14:29:04 EDT 2008 | davef

�Another direct measurement to determine resistivity values (i.e. of remaining no-clean residues) can be performed through impedance spectroscopy. The surface resistance underneath chip resistors and capacitors can be determined to show the improveme


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