Electronics Forum: 0.8mm (Page 6 of 8)

Re: Micro Vias in Pads

Electronics Forum | Mon Mar 30 16:02:44 EST 1998 | Michael Allen

| We have successfully put .016" vias in .030" pads. | There is no issue with .030" solder balls, since | the actual volume of the .002" via in pad is small | compared to the ball+solder paste volume. | We did notice random bubbles where, apparentl

Recycling components

Electronics Forum | Thu Aug 03 12:51:20 EDT 2006 | Ofer Cohen

I'd appreciate your support in the following issue: A significant batch of PCBs failed on de-lamination. The failure was identified, of course, only after the assembly. There is a big variety of components (BGA 1mm, BGA 0.8 mm, FQPs and other SMT co

Recycling components

Electronics Forum | Thu Aug 03 12:51:59 EDT 2006 | Ofer Cohen

I'd appreciate advise in the following issue: A significant batch of PCBs failed on de-lamination. The failure was identified, of course, only after the assembly. There is a big variety of components (BGA 1mm, BGA 0.8 mm, FQPs and other SMT componen

Assembly of CSP on pads with vias.

Electronics Forum | Sat Jan 23 09:36:35 EST 1999 | Parvez Patel

Hi Everyone, We plan to build, for reliability/experimental/research purpose some CSPs (namely Tessera microBGA 46-I/O 0/75mm pitch and TI 64 I/O 0/8 mm pitch). the various factors that we plan to evaluate are the reliability and assembly concerns fo

Re: too bent or not too bent...

Electronics Forum | Fri Dec 10 17:08:51 EST 1999 | John Thorup

Tell those leads not to be drinking so much. Anyway... too bent to work in a sequencer or auto insertion machine is a lot less bent than if you're trying to manually stick it into a hole. As far as where the lead exit/enters the body of the compone

MELF component short togehter

Electronics Forum | Thu Jun 13 21:44:21 EDT 2002 | jkhiew

Hi all, * Defect : termial to terminal touching btw two melfs body that created short circuit. * Clearance : 0.8mm btw two melfs body. * Size melf : diameter=2.4mm to 2.7mm, length=4.8mm to 5.2mm * Stencil opening : "v" shaped to minimise component

BGA PROCESS MATERIAL

Electronics Forum | Fri Feb 20 08:56:42 EST 2004 | davef

We successfully clean WS flux on 1mm and 1.25mm pitch BGA. For 0.8mm pitch BGA, we use no clean, because we cannot remove the flux residue from under them efficiently. Use ion chromatography testing to be sure it is clean under the BGA. IC is the on

How to qualify move from water wash SMT process to No clean?

Electronics Forum | Thu Jun 24 20:28:58 EDT 2004 | needhelp

We design PCBAs. Our CM assembles the boards for us. So far we have used waterwash SMT process to build the boards. Accidentally, due to documentation errors, we suddenly have a huge batch of boards built with No-Clean process. Although the boards pa

Design rule for vias

Electronics Forum | Wed Dec 06 21:28:12 EST 2006 | davef

It's worse than just using the test equipment manufacturer guidelines. Along with that, you have to deal with each of the test fixture fabricators' preferences as well. What this boils down to is a negotiation with the test engineering group as to w

gas to extend allowed print-to-place time?

Electronics Forum | Mon May 02 12:35:33 EDT 2016 | adamjs

Or try : http://www.sipad.com/ I think sipad is incredibly cool and would be the perfect solution, but is way too expensive. We're paying $0.80/each for four-layer ENIG boards, 50cm^2 with 0.125mm trace/space and 0.8mm-pitch LGA landings in lots of


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