Technical Library | 2017-01-05 16:55:11.0
The July 2006 implementation of ROHS exempted automotive applications from converting to lead free technology. Nine years later, all major OEM and Tier 1 automotive manufacturers have converted or are in the process of converting to lead free circuit assembly processing. Starting with SAC (SnAgCu) alloys as a baseline for lead free soldering, in the last years several specific alloys were developed in order to improve resistance to high temperature creep, vibration survival and the ability to withstand thermal cycling and thermal shock.The paper compares three different solder alloys and two flux chemistries in terms of void formation and mechanical / thermal fatigue properties. Void content and reliability data of the alloys will be presented and discussed in relation to the acceptance criteria of a Tier 1 /OEM automotive supplier. As a result, a ranking list will be presented considering the combined performance of the alloys. In order to analyze the void formation and mechanical behavior of different solder alloys and flux chemistry combinations, statistical methods are used.
Technical Library | 2015-10-01 16:12:51.0
Solder paste printing is known to be one of the most difficult processes to quality assure in electronic manufacturing. The challenge increases as the technology development moves toward a mix between large modules and small chip components on large and densely populated printed circuit boards. Having a process for quality assurance of the solder paste print is fast becoming a necessity.This article describes a method to ensure quality secured data from both solder paste printers and inspection machines in electronic assembly manufacturing. This information should be used as feedback in order to improve the solder paste printing process.
Technical Library | 2015-01-28 17:39:34.0
Stacking heterogeneous semiconductor die (memory and logic) within the same package outline can be considered for less complex applications but combining the memory and processor functions in a single package has compromised test efficiency and overall package assembly yield. Separation and packaging the semiconductor functions into sections, on the other hand, has proved to be more efficient and, even though two interposers are required, more economical. The separated logic and memory sections are configured with the same uniform outline for vertical stacking (package-on-package). The most common configuration places the logic section as the base with second tier memory section soldered to a mating contact pattern. This paper addresses the primary technological challenges for reducing contact pitch and package-on-package interface technology.
Technical Library | 2011-09-08 13:46:10.0
Anisotropic Conductive Adhesive Bonding is an interconnection technique mostly used for connecting displays to pcb’s using anisotropic conductive adhesive and flex foils. For successful implementation there are a few basic constraints. If these are followed, display connection is a simple and reliable process, giving top quality connections. Heat-Sealing can be done in any factory and can be introduced in a few months, from start of design to mass productions
Technical Library | 2008-03-25 18:15:54.0
Thin film thermoelectric devices offer a fundamentally new operating regime for integrated, active cooling solutions and localized thermal management, yet the assembly methodology used to implement these devices is fully compatible with existing surface mount approaches. In order to take advantage of these unique characteristics, thin film thermoelectric devices need to be designed for the appropriate thermal and form-factor environments, with system-level constraints carefully considered as an integral part of the overall design process.
Technical Library | 2012-12-14 14:17:56.0
This article provides practical and affordable Design-for- Test (DFT) and Design-for-Inspection (DFI) methods that will have a positive impact on product costs, yield, reliability, and time-to-market. The properties of testability (including controllability and observability) will be analysed as they relate to analogue and digital design rules and their cause/effect, as well as the electrical and physical characteristics of proper PCB design.
Technical Library | 2010-03-18 14:02:03.0
Selecting products that have been qualified by industry standards for use in printed circuit board assembly processes is an accepted best practice. That products which have been qualified, when used in combinations not specifically qualified, may have resultant properties detrimental to assembly function though, is often not adequately understood. Printed circuit boards, solder masks, soldering materials (flux, paste, cored wire, rework flux, paste flux, etc.), adhesives, and inks, when qualified per industry standards, are qualified using very specific test methods which may not adequately mimic the assembly process ultimately used.
Technical Library | 2010-06-30 17:43:04.0
As silicon technology advances to enable higher density ASICs, the core logic voltage decreases. The lower voltage, in combination with higher current requirements, requires tighter tolerances on the power supplies. The control of the power supplies from the PCB to the die is the subject of this study. A frequency sweep simulation using typical bypass values shows that a discrete package capacitor is not a significant factor in reducing the chip core power supply fluctuation. A small voltage boost at the PCB supply can provide a more economical solution to managing the device supplies.
Technical Library | 2012-05-31 18:01:31.0
First published in the 2012 IPC APEX EXPO technical conference proceedings. Considering technological advances in multi-depth cavities in the PCB manufacturing industry, various subtopics have materialized regarding the processing and application of such
Technical Library | 2017-11-15 22:49:14.0
While a significant level of voiding can be tolerated in solder joints where electrical conductivity is the main requirement, voiding at any level severely compromises thermal conductivity. For example, in LED lighting modules effective conduction of heat through the 1st level die attach to the substrate and then through the 2nd level attach to the heat sink is critical to performance so that voiding in the solder joints at both levels must be minimized. (...) In this paper, the authors will review the factors that influence the incidence of voids in small and large area solder joints that simulate, respectively, the 1st and 2nd level joints in LED modules and discuss mitigation strategies appropriate to each level. They will also report the results of a study on the effect on the incidence of voids of flux medium formulation and the optimization of the thermal profile to ensure that most of the volatiles are released early in the reflow process.