Electronics Forum | Wed Jul 16 14:13:17 EDT 2014 | alexeis
Hi, If you can not rely on your programmer and the tools he uses then "double checking" can save you only materials but in time you really do not save often extend meaning. There are things you can identify before the stove, but if you use tools li
Electronics Forum | Mon Jan 17 12:16:02 EST 2000 | Brian W.
My old company (CM) ran SMT to 50ppm including some very complex boards. We established the normalizer number by: #components + #solder joints. As was stated earlier, the ppm for any given product is the result of many factors. You may get differen
Electronics Forum | Thu Jul 17 17:36:28 EDT 2014 | proy
Hi, > > If you can not rely on your programmer and > the tools he uses then "double checking" can save > you only materials but in time you really do not > save often extend meaning. There are things you > can identify before the stove, but if
Electronics Forum | Tue Dec 23 11:55:37 EST 2003 | Marc Simmel
Details, details: 1) The metal shell is part of the component body. The base metal is austenitic stainless steel (304) that has been plated with 90/10 tin-lead over nickel (semi-bright). 2) The entire part (leads and shell) is elevated by the mass o
Electronics Forum | Wed Jun 10 11:21:04 EDT 1998 | Kelly Morris
Does anyone have any info./studies on what the percentage or PPM defect rates are for each part of the typical SMT process. Example: Screen Print = 45% of total defects Component Placement = 25% of total defects
Electronics Forum | Fri Apr 30 10:39:15 EDT 2004 | Bryan She
I found much ICT fails on the same location(Ref.des:Q166) on my boards. 1.Defects rate:more than 20%. 2.We measured the value of the transistor before reflow oven,it's ok.but measure again after been reflowed,result is fail.it seems fails happen duri
Electronics Forum | Fri Aug 04 04:26:31 EDT 2000 | Charles stringer
I am experiencing a problem when soldering down a TO263 package. The device has a large solderable tab (approx 8mm square)on the back and 5 leads. Sometimes the leads are not soldered to the board properly. I am using a metal mask with 9 "windows" of
Electronics Forum | Wed Jun 10 13:24:35 EDT 1998 | Justin Medernach
| Does anyone have any info./studies on what the percentage or PPM defect rates are for each part of the typical SMT process. | Example: | Screen Print = 45% of total defects | Component Placement = 25% of total defects |
Electronics Forum | Wed Jun 15 13:08:43 EDT 2011 | hegemon
Check your reflow profile as well, it could be that your ramp rate from flux activation to reflow might be too steep. This is in the same line as the post from Ken. Too fast a rise in temperature will collapse the outside rows too far in advance of
Electronics Forum | Thu Aug 15 15:44:46 EDT 2002 | dragonslayr
You can't control what you don't measure. You have provided very little detail other than post reflow costs are high. What defects are attributed to problems experienced prior to reflow? Are these random or recurring defects? You will need to put ea
